ISL43L410 Datasheet, PDF (5/11 Pages) Intersil Corporation – Ultra Low ON-Resistance, Low Voltage, Single Supply, DPDT Analog Switch

ISL43L410
Test Circuits and Waveforms
V+
LOGIC
INPUT
0V
SWITCH
INPUT
V_NO
SWITCH
OUTPUT _0V
50%
t_OFF
V_OUT
90%
t_ON
t_r < 5ns
t_f < 5ns
90%
V+
C
SWITCH
INPUT
LOGIC
INPUT
NO or NC
ADD
COM
GND INH
V_OUT
R_L
C_L
50Ω 35pF
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. C_L includes fixture and stray
capacitance.
V_OUT
=
V(NO _{or NC)}
------------^R-----^L-------------
R_L + R_(ON)
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
SWITCH
OUTPUT
V_OUT
LOGIC ^ON
INPUT
∆V_OUT
OFF
V+
ON
0V
R_G
NO or NC
COM
V_G
INH GND ADD
LOGIC
INPUT
Q = ∆V_OUT x C_L
FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V_OUT
C_L
V+
C
V+
LOGIC
INPUT
0V
V_NX
NO
NC
ADD
COM
V_OUT
R_L
C_L
50Ω
35pF
SWITCH
OUTPUT
V_{OUT 0V}
90%
LOGIC
INPUT
GND INH
t_D
Repeat test for all switches. C_L includes fixture and stray
capacitance.
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
5
FN6090.1
November 3, 2004