82C82 Datasheet, PDF (5/7 Pages) Intersil Corporation – CMOS Octal Latching Bus Driver

82C82
AC Electrical Specifications V_CC = 5.0V ±10%;
T_A = 0^oC to +70^oC (C82C82);
C_L
=
300pF
(Note
1),
Freq
=
1MHz
T_A
T_A
=
=
-40^oC
-55^oC
to
to
+85^oC (I82C82);
+125^oC (M82C82)
SYMBOL
PARAMETER
MIN
MAX
UNITS
TEST CONDITIONS
(1) TIVOV
Propagation Delay Input to Output
-
35
ns
Notes 2, 3
(2) TSHOV
Propagation Delay STB to Output
-
55
ns
Notes 2, 3
(3) TEHOZ
Output Disable Time
-
35
ns
Notes 2, 3
(4) TELOV
Output Enable Time
-
50
ns
Notes 2, 3
(5) TIVSL
Input to STB Setup Time
0
-
ns
Notes 2, 3
(6) TSLIX
Input to STB Hold Time
25
-
ns
Notes 2, 3
(7) TSHSL
STB High Time
25
-
ns
Notes 2, 3
(8) TR, TF
Input Rise/Fall Times
-
20
ns
Notes 2, 3
NOTES:
1. Output load capacitance is rated at 300pF for ceramic and plastic packages.
2. All AC parameters tested as per test circuits and definitions below. Input rise and fall times are driven at 1ns/V.
3. Input test signals must switch between V_IL - 0.4V and V_IH +0.4V.
Timing Waveforms
INPUTS
STB
2.0V
0.8V
TR, TF (8)
TIVSL (5) TSLIX
(6)
TSHSL (7)
OE
OUTPUTS
TIVOV
(1)
TSHOV (2)
TEHOZ (3)
VOH -0.1V
VOL +0.1V
TELOV (4)
2.4V
0.8V
Test Load Circuits
1.7V
0.6V
3.3V
OUTPUT
150Ω
TEST
POINT
OUTPUT
300Ω _TEST
POINT
OUTPUT
300Ω _TEST
POINT
300pF
(NOTE)
TIVOV, TSHOV, TELOV
NOTE: Includes stray and jig capacitance.
50pF
(NOTE)
TEHOZ OUTPUT HIGH DISABLE
50pF
(NOTE)
TEHOZ OUTPUT LOW DISABLE
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