X9118 Datasheet, PDF (4/20 Pages) Intersil Corporation – Dual Suply/Low Power/1024-Tap/2-Wire Bus

X9118
PRINCIPLES OF OPERATION
The X9118 is an integrated microcircuit incorporating
a resistor array and their its registers and counters and
the serial interface logic providing direct
communication between the host and the digitally
controlled potentiometer. This section provides detail
description of the following:
– Resistor Array Description
– Serial Interface Description
– Instruction and Register Description
Resistor Array Description
The X9118 is comprised of a resistor array. The array
contains 1023, in effect, discrete resistive segments
that are connected in series (see Figure 1). The
Figure 1. Detailed Potentiometer Block Diagram
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (R_H and R_L
inputs).
At both ends of each array and between each resistor
segment is a CMOS switch (transmission gate)
connected to the wiper (R_W) output. Within each
individual array only one switch may be turned on at a
time. These switches are controlled by the Wiper
Counter Register (WCR). The 10-bits of the WCR
(WCR[9:0]) are decoded to select, and enable, one of
1024 switches.
The WCR may be written directly. The Data Registers
and the WCR can be read and written by the host
system.
Serial Data Path
Serial
RH
From Interface
Circuitry
Bus
Input
Register 0
Register 1
C
(DR0)
(DR1)
O
U
10
10 Parallel
Bus
Input
N
T
E
R
Register 2
(DR2)
Register 3
(DR3)
Wiper
D
Counter
E
Register
C
(WCR)
O
D
E
If WCR = 000[HEX] then R_W = R_L
If WCR = 3FF[HEX] then R_W = R_H
RL
Serial Interface Description
SERIAL INTERFACE – 2-WIRE
The X9118 supports a bidirectional bus oriented
protocol. The protocol defines any device that sends
data onto the bus as a transmitter and the receiving
device as the receiver. The device controlling the
transfer is a master and the device being controlled is
the slave. The master will always initiate data transfers
and provide the clock for both transmit and receive
operations. Therefore, the X9118 will be considered a
slave device in all applications.
RW
CLOCK AND DATA CONVENTIONS
Data states on the SDA line can change only during
SCL LOW periods. SDA state changes during SCL
HIGH are reserved for indicating start and stop
conditions. See Figure 3.
START CONDITION
All commands to the X9118 are preceded by the start
condition, which is a HIGH to LOW transition of SDA
while SCL is HIGH. The X9118 continuously monitors
the SDA and SCL lines for the start condition and will
not respond to any command until this condition is
met. See Figure 3.
4
FN8161.1
March 25, 2005