ISL6525_04 Datasheet, PDF (4/11 Pages) Intersil Corporation – Buck and Synchronous-Rectifier Pulse-Width Modulator (PWM) Controller

ISL6525
Typical Performance Curves
1000
100
10
R_T PULLUP
TO +12V
R_T PULLDOWN
TO V_SS
10
100
SWITCHING FREQUENCY (kHz)
FIGURE 1. R_T RESISTANCE vs FREQUENCY
1000
Functional Pin Descriptions
RT (Pin 1)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R_T) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Fs ≈ 200kHz + --⁵----^•-----¹---⁰----⁶--
R_T(kΩ)
(R_T to GND)
Conversely, connecting a pull-up resistor (R_T) from this pin to
V_CC reduces the switching frequency according to the
following equation.:
Fs ≈ 200kHz – --⁴----^•-----¹---⁰----⁷--
R_T(kΩ)
(R_T to 12V)
OCSET (Pin 2)
Connect a resistor (R_OCSET) from this pin to the drain of the
upper MOSFET. R_OCSET, an internal 200µA current source
(I_OCS), and the upper MOSFET on-resistance (r_DS(ON)) set
the converter over-current (OC) trip point according to the
following equation:
I_PEAK
=
I_{--O-----C----S-----}•_----R_{-----O----C-----S----E---T--}
r_DS(ON)
An over-current trip cycles the soft-start function.
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10µA current source, sets the soft-
start interval of the converter.
COMP (Pin 4) and FB (Pin 5)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
4
80
70
60
C_GATE = 3300pF
50
40
30
C_GATE = 1000pF
20
10
C_GATE = 10pF
0
100 200 300 400 500 600 700 800 900 1000
SWITCHING FREQUENCY (kHz)
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
GND (Pin 6)
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
PGOOD (Pin 7)
PGOOD is an open-drain output used to indicate the status
of the converter output voltage. This pin is pulled low when
the converter output is not within ±10% of the set voltage. A
delay time can be programmed using the DELAY pin (pin
14). See Pin 14 description for more information.
PHASE (Pin 8)
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for over-current protection. This pin also provides the return
path for the upper gate drive.
UGATE (Pin 9)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.
BOOT (Pin 10)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
PGND (Pin 11)
This is the power ground connection. Tie the lower MOSFET
source to this pin.
LGATE (Pin 12)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
VCC (Pin 13)
Provide a 12V bias supply for the chip to this pin.
DELAY (Pin 14)
This pin is used to program the delay of the PGOOD (pin 7)
signal by placing a capacitor between this pin and GND or
VCC. The external capacitor only delays the rising edge of
FN4998.3
December 27, 2004