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ISL6131 Datasheet, PDF (4/13 Pages) Intersil Corporation – Multiple Voltage Supervisory ICs
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ISL6131, ISL6132
Absolute Maximum Ratings
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
VMON, ENABLE, STATUS, PGOOD . . . . . . . . . . -0.3V to VDD+0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV (HBM)
Operating Conditions
VDD Supply Voltage Range . . . . . . . . . . . . . . . . . . . . +1.5V to +5.5V
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Thermal Information
Thermal Resistance (Typical, Notes 1, 2) θJA (°C/W) θJC (°C/W)
4x4 QFN Package . . . . . . . . . . . . . . . .
48
9
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
3. All voltages are relative to GND, unless otherwise specified.
Electrical Specifications
PARAMETER
Nominal VDD = 1.5V to +5V, TA = TJ = -40°C - 85°C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
(Note 4) TYP
MAX
(Note 4)
UNIT
VMON/ENABLE INPUTS
VMON Threshold
VMON Threshold Temp. Coeff.
VMON Hysteresis
VMON Glitch Filter
VVMONvth TJ = +25°C
TCVMONvth TJ from -40°C to +85°C
VVMONhys
Tfil
619
633
647
mV
-
40
-
nV/°C
-
10
-
mV
-
30
-
μs
VMON Minimum Input Impedance
Zin_min
Tj = +40°C, VMON within 63mV of
VVMONvth
8
MΩ
ENABLE L2H, Delay to STATUS & PGOOD
VMON valid, EN high to STATUS & PG high -
160
-
ms
EN H2L, Delay to PGOOD
EN low to PGOOD low
-
-
0.1
μs
EN H2L, Delay to STATUS
EN low to STATUS low
-
13
-
μs
ENABLE Pull-up Voltage
ENABLE Threshold Voltage
STATUS/PGOOD OUTPUTS
VENVTH
EN open
-
VDD
-
V
-
VDD/2
-
V
STATUS Pull-Down Current
STATUS/PGOOD Delay after VMON Valid
STATUS/PGOOD Output Low
BIAS
IRSTpd
TdelST
Vol
RST = 0.1V
VMON > VUVvth to STATUS = 0.2V
Measured at VDD = 1.0V
-
88
-
mA
-
160
-
ms
-
0.04
0.1
V
IC Supply Current
IVDD_5.5V VDD = 5V
-
170
-
μA
IC Supply Current
IVDD_3.3V VDD = 3.3V
-
145
-
μA
IC Supply Current
IVDD_1.5V VDD = 1.5V
-
100
-
μA
VDD Power On
VDD_POR VDD high to low
-
0.89
1
V
VDD Power On Lock Out
VDD_LO VDD low to high
-
0.91
-
V
NOTE:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
4
FN9119.4
August 17, 2010
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