ISL6131 Datasheet, PDF (13/13 Pages) Intersil Corporation – Multiple Voltage Supervisory ICs

ISL6131, ISL6132
Package Outline Drawing
L24.4x4
24 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 4, 10/06
PIN 1
INDEX AREA
4.00
4X 2.5
A
B
20X 0.50
PIN #1 CORNER
19
24
(C 0 . 25)
18
1
2 . 10 ± 0 . 15
(4X)
0.15
TOP VIEW
13
12
7
24X 0 . 4 ± 0 . 1
0.10 M C A B
24X
0
.
23
+
-
0
0
.
.
07
05
4
BOTTOM VIEW
( 3 . 8 TYP )
( 2 . 10 )
0 . 90 ± 0 . 1
( 20X 0 . 5 )
TYPICAL RECOMMENDED LAND PATTERN
( 24X 0 . 25 )
( 24X 0 . 6 )
SIDE VIEW
SEE DETAIL "X"
0.10 C
C
BASE PLANE
SEATING PLANE
0.08 C
C
0 . 2 REF
5
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
13
FN9119.4
August 17, 2010