ISL55141 Datasheet, PDF (4/7 Pages) Intersil Corporation – Evaluation Board User’s Manual

Application Note 1270
ISL55142IVZ Evaluation Board Schematic
QA_J3
QB_J4
QA0
R1
50Ω
VOL
QB0
R2
50Ω
VOL
S1 - POWER-DOWN CONTROL
SPDT - CENTER OFF
VEE
VDD
PD - BN_J5
VINP
TP07-VINP
PD
DIF+
TP01-QA_VOL
DIF+
DIF--
GND
DIF--
TP02-QB_VOL
DIF+
DIF--
1 _{VEE PD} 14
4
5
6
7
QA
QB
VOL
VOH
CVB
VINP
CVA
VCC
VEE
12 ^CVB_BUS
11
10 CVA_BUS
9
VCC
8
VEE
VINP
ISL55141_TSSOP
VOH
TP03-VOH_VOL
VOL
JP01
VOL = VEE
VEE
R18
R14
VINP_J8
0Ω
0Ω
R20
NOT POPULATED
GND
CVB_BUS
TP06_CVB
DIF+
DIF--
CVB_BUS
C5
0.1µF
C7
+4.7µF
J9-CVB - Banana Jack
GND
CVA_BUS
TP05_CVA
DIF+
DIF--
CVA_BUS
C6
0.1µF
GND
GND
C8
+4.7µF
J10-GND - Banana Jack
J11-CVA - Banana Jack
VOL - Banana Jack
C1 C2
DIF+
+4.7µF 0.1µF
DIF--
JP02
JP03
VOL = GND VEE = GND
VCC
C4
C3
+4.7µF 0.1µF
TP04_VCC_VEE GND
VOH - Banana Jack
VOL
VOL
GND
VEE
GND
GND - Banana Jack VCC - Banana Jack VEE - Banana Jack
FIGURE 8. ISL55141IVZ TSSOP SINGLE COMPARATOR EVALUATION BOARD SCHEMATIC
4
AN1270.0
September 27, 2006