CD4510BMS Datasheet, PDF (4/11 Pages) Intersil Corporation – CMOS Presettable Up/Down Counters

CD4510BMS, CD4516BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
Output Current (Source)
SYMBOL
CONDITIONS
IOH5B VDD = 5V, VOUT = 2.5V
Output Current (Source)
IOH10 VDD = 10V, VOUT = 9.5V
Output Current (Source)
IOH15 VDD =15V, VOUT = 13.5V
Input Voltage Low
VIL VDD = 10V, VOH > 9V, VOL < 1V
Input Voltage High
VIH VDD = 10V, VOH > 9V, VOL < 1V
Propagation Delay
Clock to Q Output
Propagation Delay
Preset or Reset to Q
Propagation Delay
Clock to Carry Out
Propagation Delay
Carry In to Carry Out
Propagation Delay Preset
or Reset to Carry Out
Transition Time
Maximum Clock Input Fre-
quency
Minimum Hold Time
Preset Enable to JN
Minimum Data Setup Time
Preset Enable to JN
Minimum Data Hold Time
Clock to Carry In
Minimum Clock Hold Time
Clock to Up/Down
Input Capacitance
TPHL1
TPLH1
TPHL2
TPLH2
TPHL3
TPLH3
TPHL4
TPLH4
TPHL5
TPLH5
TTLH
TTHL
FCL
TH
TS
TH
TH
CIN
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 5V
VDD = 10V
VDD = 15V
VDD = 5V
VDD = 10V
VDD = 15V
VDD = 5V
VDD = 10V
VDD = 15V
VDD = 5V
VDD = 10V
VDD = 15V
Any Input
NOTES
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3
1, 2, 3
1, 2
1, 2
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2
TEMPERATURE MIN
+125^oC
-
-55^oC
-
+125^oC
-
-55^oC
-
+125^oC
-
-55^oC
-
+25^oC, +125^oC, -
-
55^oC
+25^oC, +125^oC, - +7
55^oC
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
4
+25^oC
5.5
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
+25^oC
-
MAX
-1.15
-2.0
-0.9
-1.6
-2.4
-4.2
3
UNITS
mA
mA
mA
mA
mA
mA
V
-
V
200
ns
150
ns
210
ns
160
ns
240
ns
180
ns
120
ns
100
ns
320
ns
250
ns
100
ns
80
ns
-
MHz
-
MHz
70
ns
40
ns
40
ns
25
ns
10
ns
10
ns
60
ns
30
ns
30
ns
30
ns
30
ns
30
ns
7.5
pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial
design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Reset to Carry Out (TPLH) only.
4