ISL6236A Datasheet, PDF (35/37 Pages) Intersil Corporation – High-Efficiency, Quad-Output, Main Power Supply Controllers for Notebook Computers

ISL6236A
while both switches are off (dead time). The drop is
I_L ⋅ r_DS(ON) when the low-side switch conducts.
The rectifier is a clamp across the synchronous rectifier that
catches the negative inductor swing during the dead time
between turning the high-side MOSFET off and the
synchronous rectifier on. The MOSFETs incorporate a
high-speed silicon body diode as an adequate clamp diode if
efficiency is not of primary importance. Place a Schottky
diode in parallel with the body diode to reduce the forward
voltage drop and prevent the Q₂/Q₄ MOSFET body diodes
from turning on during the dead time. Typically, the external
diode improves the efficiency by 1% to 2%. Use a Schottky
diode with a DC current rating equal to one-third of the load
current. For example, use an MBR0530 (500mA-rated) type
for loads up to 1.5A, a 1N5817 type for loads up to 3A, or a
1N5821 type for loads up to 10A. The rectifier's rated
reverse breakdown voltage must be at least equal to the
maximum input voltage, preferably with a 20% derating
factor.
Applications Information
Dropout Performance
The output voltage-adjust range for continuous-conduction
operation is restricted by the nonadjustable 350ns (max)
minimum off-time one-shot. Use the slower 5V SMPS for the
higher of the two output voltages for best dropout
performance in adjustable feedback mode. The duty-factor
limit must be calculated using worst-case values for on- and
off-times, when working with low input voltages.
Manufacturing tolerances and internal propagation delays
introduce an error to the t_ON K-factor. Also, keep in mind that
transient-response performance of buck regulators operated
close to dropout is poor, and bulk output capacitance must
often be added (see Equation 11 on page 33).
The absolute point of dropout occurs when the inductor
current ramps down during the minimum off-time (ΔI_DOWN)
as much as it ramps up during the on-time ( ΔI_UP). The ratio
h = ΔI_UP/ΔI_DOWN indicates the ability to slew the inductor
current higher in response to increased load, and must
always be greater than 1. As h approaches 1, the absolute
minimum dropout point, the inductor current is less able to
increase during each switching cycle and V_SAG greatly
increases unless additional output capacitance is used.
A reasonable minimum value for h is 1.5, but this can be
adjusted up or down to allow trade-offs between V_SAG,
output capacitance and minimum operating voltage. For a
given value of h, the minimum operating voltage can be
calculated in Equation 23:
V_IN(MIN)
=
-⁽--^V----^O-----^U----^T---^_-----+-----^V----^D----^R----^O-----^P----⁾
1
–
⎛
⎝
t_{--O-----F----F---(--M-K----I--N----)---}⋅_---h_{--⎠⎞}
+
V_DROP2
–
V_DROP1
(EQ. 23)
where V_DROP1 and V_DROP2 are the parasitic voltage drops
in the discharge and charge paths (see “ON-TIME ONE-
SHOT (t_ON)” on page 20), t_OFF(MIN) is from “Electrical
Specifications” table on page 6 and K is taken from Table 2.
The absolute minimum input voltage is calculated with h = 1.
Operating frequency must be reduced or h must be
increased and output capacitance added to obtain an
acceptable V_SAG if calculated V_IN(MIN) is greater than the
required minimum input voltage. Calculate V_SAG to be sure
of adequate transient response if operation near dropout is
anticipated.
Dropout Design Example:
ISL6236A: With V_OUT2 = 5V, fsw = 400kHz, K = 2.25µs,
t_OFF(MIN) = 350ns, V_DROP1 = V_DROP2 = 100mV, and
h = 1.5, the minimum V_IN is:
V_IN(MIN)
=
--------⁽---⁵---^V------+-----⁰---^.--¹----^V----⁾-------- + 0.1V – 0.1V=
1
–
⎛
⎝
0_----._--3_-2--5_-.--2-μ_--5--s_--μ--⋅_--s-1_---._--5_{--⎠⎞}
6.65 V
(EQ. 24)
Calculating with h = 1 yields:
V_IN(MIN)
=
------⁽--⁵----^V-----+-----⁰----^.-¹----^V----⁾------ + 0.1V – 0.1V=
1
–
⎛
⎝
0_----.2_--3_--.-52_----μ_5----s_μ----s⋅_---1_{--⎠⎞}
6.04 V
(EQ. 25)
Therefore, V_IN must be greater than 6.65V. A practical input
voltage with reasonable output capacitance would be 7.5V.
PC Board Layout Guidelines
Careful PC board layout is critical to achieve minimal switching
losses and clean, stable operation. This is especially true when
multiple converters are on the same PC board where one
circuit can affect the other. Refer to the ISL6236 Evaluation Kit
Application Notes (AN1271 and AN1272) for a specific layout
example.
Mount all of the power components on the top side of the board
with their ground terminals flush against one another, if
possible. Follow these guidelines for good PC board layout:
• Isolate the power components on the top side from the
sensitive analog components on the bottom side with a
ground shield. Use a separate PGND plane under the
OUT1 and OUT2 sides (called PGND1 and PGND2). Avoid
the introduction of AC currents into the PGND1 and PGND2
ground planes. Run the power plane ground currents on the
top side only, if possible.
• Use a star ground connection on the power plane to
minimize the crosstalk between OUT1 and OUT2.
• Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation.
• Keep the power traces and load connections short. This
practice is essential for high efficiency. Using thick copper
PC boards (2oz vs 1oz) can enhance full-load efficiency
by 1% or more. Correctly routing PC board traces must be
35
FN6453.3
March 18, 2008