ISL6236A Datasheet, PDF (29/37 Pages) Intersil Corporation – High-Efficiency, Quad-Output, Main Power Supply Controllers for Notebook Computers

ISL6236A
For lower power dissipation, the ISL6236A uses the
ON-resistance of the synchronous rectifier as the
current-sense element. Use the worst-case maximum value
for r_DS(ON) from the MOSFET data sheet. Add some margin
for the rise in r_DS(ON) with temperature. A good general rule
is to allow 0.5% additional resistance for each °C of
temperature rise. The ISL6236A controller has a built-in 5µA
current source as shown in Figure 75. Place the hottest
power MOSEFTs as close to the IC as possible for best
thermal coupling. The current limit varies with the
ON-resistance of the synchronous rectifier. When combined
with the undervoltage-protection circuit, this current-limit
method is effective in almost every circumstance.
ILIM
RILIM VILIM
5µA
VCC
9R ^{TO CURRENT}
LIMIT LOGIC
R
FIGURE 75. CURRENT LIMIT BLOCK DIAGRAM
A negative current limit prevents excessive reverse inductor
currents when VOUT sinks current. The negative
current-limit threshold is set to approximately 120% of the
positive current limit and therefore tracks the positive current
limit when ILIM is adjusted. The current-limit threshold is
adjusted with an external resistor for ISL6236A at ILIM. The
current-limit threshold adjustment range is from 20mV to
200mV. In the adjustable mode, the current-limit threshold
voltage is 1/10th the voltage at ILIM. The voltage at ILIM pin
is the product of 5µA*R_ILIM. The threshold defaults to
100mV when ILIM is connected to VCC. The logic threshold
for switch-over to the 100mV default value is approximately
VCC -1V.
The PC board layout guidelines should be carefully
observed to ensure that noise and DC errors do not corrupt
the current-sense signals at PHASE.
MOSFET Gate Drivers (UGATE, LGATE)
The UGATE and LGATE gate drivers sink 2.0A and 3.3A
respectively of gate drive, ensuring robust gate drive for
high-current applications. The UGATE floating high-side
MOSFET drivers are powered by diode-capacitor charge
pumps at BOOT. The LGATE synchronous-rectifier drivers
are powered by PVCC.
55VV
BOOT
10Ω
VIN
UGATE
Q1
CBOOT
ISL88732
ISIS_SLL8_{L686272333636AA}
ISL88734
PHASE
OUT
FIGURE 76. REDUCING THE SWITCHING-NODE RISE TIME
The internal pull-down transistors that drive LGATE low have
a 0.6Ω typical ON-resistance. These low ON-resistance
pull-down transistors prevent LGATE from being pulled up
during the fast rise time of the inductor nodes due to
capacitive coupling from the drain to the gate of the low-side
synchronous-rectifier MOSFETs. However, for high-current
applications, some combinations of high- and low-side
MOSFETs may cause excessive gate-drain coupling, which
leads to poor efficiency and EMI-producing shoot-through
currents. Adding a 1Ω resistor in series with BOOT
increases the turn-on time of the high-side MOSFETs at the
expense of efficiency, without degrading the turn-off time
(see Figure 76).
Adaptive dead-time circuits monitor the LGATE and UGATE
drivers and prevent either FET from turning on until the other
is fully off. This algorithm allows operation without shoot-
through with a wide range of MOSFETs, minimizing delays
and maintaining efficiency. There must be low-resistance,
low-inductance paths from the gate drivers to the MOSFET
gates for the adaptive dead-time circuit to work properly.
Otherwise, the sense circuitry interprets the MOSFET gate
as "off" when there is actually charge left on the gate. Use
very short, wide traces measuring 10 to 20 squares (50 mils
to 100 mils wide if the MOSFET is 1” from the device).
Boost-Supply Capacitor Selection (Buck)
The boost capacitor should be 0.1µF to 4.7µF, depending on
the input and output voltages, external components, and PC
board layout. The boost capacitance should be as large as
possible to prevent it from charging to excessive voltage, but
small enough to adequately charge during the minimum
low-side MOSFET conduction time, which happens at
maximum operating duty cycle (this occurs at minimum input
voltage). The minimum gate to source voltage (V_GS(MIN)) is
determined by:
V_GS(MIN)
=
P
V
C
C
⋅
----------^C-----^B---^O-----^O----^T------------
C_BOOT + C_GS
(EQ. 5)
29
FN6453.3
March 18, 2008