ISL6236A Datasheet, PDF (19/37 Pages) Intersil Corporation – High-Efficiency, Quad-Output, Main Power Supply Controllers for Notebook Computers

ISL6236A
Typical Performance Curves
Circuit of Figures 66, 67 and 68, no load on LDO, OUT1, OUT2, V_REF3, and REF, V_IN = 12V,
EN2 = EN1 = VCC, V_BYP = 5V, PVCC = 5V, V_{EN_LDO} = 5V, T_A = -40°C to +100°C, unless
otherwise noted. Typical values are at T_A = +25°C. (Continued)
LGATE1 5V/DIV
LGATE2 5V/DIV
V_OUT1 RIPPLE 50mV/DIV
V_OUT1 RIPPLE 20mV/DIV
IL1 5A/DIV
V_OUT2 RIPPLE 20mV/DIV
FIGURE 63. LOAD TRANSIENT V_OUT1 = 1.5V (SKIP)
IL1 5A/DIV
V_OUT2 RIPPLE 20mV/DIV
FIGURE 64. LOAD TRANSIENT V_OUT1 = 1.05V (PWM)
LGATE2 5V/DIV
V_OUT1 RIPPLE 20mV/DIV
V_OUT2 RIPPLE 20mV/DIV
IL2 5A/DIV
FIGURE 65. LOAD TRANSIENT V_OUT1 = 1.05V (SKIP)
Typical Application Circuits
The typical application circuits (Figures 66, 67 and 68) generate
the 5V/7A, 3.3V/11A, 1.25V/5A, dynamic voltage/10A, 1.5V/5A,
1.05V/5A and external 14V charge pump main supplies in a
notebook computer. The ISL6236A is also equipped with a
secondary feedback, SECFB, used to monitor the output of the
14V charge pump. In an event when the 14V drops below its
threshold voltage, SECFB comparator will turn on LGATE1 for
300ns. This will refresh an external 14V charge pump without
overcharging the output voltage. The input supply range is
5.5V to 25V.
Detailed Description
The ISL6236A dual-buck, BiCMOS, switch-mode power
supply controller generates logic supply voltages for
notebook computers. The ISL6236A is designed primarily for
battery-powered applications where high efficiency and low
quiescent supply current are critical. The ISL6236A provides
a pin-selectable switching frequency, allowing operation for
200kHz/300kHz, 400kHz/300kHz, or 400kHz/500kHz on the
SMPSs.
Light-load efficiency is enhanced by automatic Idle-Mode
operation, a variable-frequency pulse-skipping mode that
reduces transition and gate-charge losses. Each step-down,
power-switching circuit consists of 2 N-Channel MOSFETs, a
rectifier, and an LC output filter. The output voltage is the
average AC voltage at the switching node, which is
regulated by changing the duty cycle of the MOSFET
switches. The gate-drive signal to the N-Channel high-side
MOSFET must exceed the battery voltage, and is provided
by a flying-capacitor boost circuit that uses a 100nF
capacitor connected to BOOT.
Both SMPS1 and SMPS2 PWM controllers consist of a triple
mode feedback network and multiplexer, a multi-input PWM
comparator, high-side and low-side gate drivers and logic. In
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FN6453.3
March 18, 2008