English
Language : 

ISL6312 Datasheet, PDF (30/35 Pages) Intersil Corporation – Four-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR10,VR11, and AMD Applications
ISL6312
.
Case 1:
---------------1----------------
2⋅π⋅ L⋅C
>
f0
RC = RFB ⋅ 2-----⋅---π-----⋅---0f--0-.--6--⋅-6-V----⋅-p--V-p---I-⋅-N-------L----⋅----C--
CC
=
--------------0---.--6---6-----⋅---V----I--N----------------
2 ⋅ π ⋅ VPP ⋅ RFB ⋅ f0
Case 2:
---------------1----------------
2⋅π⋅ L⋅C
≤
f0
<
2-----⋅---π-----⋅---C--1----⋅---E----S-----R---
RC
=
RF
B
⋅
-V----P----P-----⋅---(--2-----⋅---π----)--2----⋅-----f-0--2-----⋅---L-----⋅---C---
0.66 ⋅ VIN
CC
=
------------------------------0----.-6----6-----⋅---V----I--N--------------------------------
(2 ⋅ π)2 ⋅ f02 ⋅ VPP ⋅ RFB ⋅ L ⋅ C
(EQ. 41)
Case 3:
f0 > 2-----⋅---π-----⋅---C--1----⋅---E----S-----R---
RC = RFB ⋅ 0-2---.--6⋅---6π-----⋅⋅---f-V-0---I--⋅N---V--⋅--p-E--p---S--⋅--R-L--
CC
=
-----0---.--6---6-----⋅---V----I--N-----⋅---E-----S----R------⋅-------C-------
2 ⋅ π ⋅ VPP ⋅ RFB ⋅ f0 ⋅ L
The optional capacitor C2, is sometimes needed to bypass
noise away from the PWM comparator (see Figure 20). Keep
a position available for C2, and be prepared to install a
high-frequency capacitor of between 22pF and 150pF in
case any leading edge jitter problem is noted.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 20, provides the
necessary compensation.
The first step is to choose the desired bandwidth, f0, of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
an extra high-frequency pole, fHF. This pole can be used for
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
good general rule is to choose fHF = 10f0, but it can be
higher if desired. Choosing fHF to be lower than 10f0 can
cause problems with too much phase shift below the system
bandwidth.
C2
RC CC
COMP
FB
C1
ISL6312
R1
RFB
IDROOP
VDIFF
FIGURE 21. COMPENSATION CIRCUIT WITHOUT LOAD-LINE
REGULATION
In the solutions to the compensation equations, there is a
single degree of freedom. For the solutions presented in
Equation 42, RFB is selected arbitrarily. The remaining
compensation components are then selected according to
Equation 42.
In Equation 42, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and VPP is the peak-to-
peak sawtooth signal amplitude as described in “Electrical
Specifications” on page 6.
R1
=
RFB
⋅ ------------C------⋅---E----S-----R-------------
L ⋅ C – C ⋅ ESR
C1
=
-----L-----⋅---C-----–-----C------⋅---E----S-----R--
RFB
C2
=
------------------------------------------0----.-7----5----⋅---V-----I--N-------------------------------------------
(2 ⋅ π)2 ⋅ f0 ⋅ fHF ⋅ ( L ⋅ C) ⋅ RFB ⋅ V(P – P)
RC
=
-V----P----P-----⋅---⎝⎛---2----π---⎠⎞---2-----⋅---f--0----⋅---f--H----F-----⋅---L-----⋅---C-----⋅---R-----F----B--
0.75 ⋅ VIN ⋅ (2 ⋅ π ⋅ fHF ⋅ L ⋅ C–1)
CC
=
-----------0---.--7---5-----⋅---V-----I-N------⋅---(--2-----⋅---π-----⋅---f--H----F-----⋅-------L-----⋅---C----–----1---)-----------
(2 ⋅ π)2 ⋅ f0 ⋅ fHF ⋅ ( L ⋅ C) ⋅ RFB ⋅ V(P – P)
(EQ. 42)
Output Filter Design
The output inductors and the output capacitor bank together
to form a low-pass filter responsible for smoothing the
pulsating voltage at the phase nodes. The output filter also
must provide the transient energy until the regulator can
respond. Because it has a low bandwidth compared to the
switching frequency, the output filter limits the system
transient response. The output capacitors must supply or
sink load current while the current in the output inductors
increases or decreases to meet the demand.
30
FN9289.5
February 25, 2010