X9252 Datasheet, PDF (3/19 Pages) Xicor Inc. – Quad Digitally-Controlled (XDCP) potentiometer

X9252
Pin Descriptions (Continued)
TSSOP PIN
SYMBOL
6
U/D
7
VCC
8
RL0
9
RH0
10
RW0
11
A2
12
WP
13
SDA
14
A1
15
RL1
16
RH1
17
RW1
18
VSS
19
CS
20
RW2
21
RH2
22
RL2
23
SCL
24
DS1
BRIEF DESCRIPTION
Increment/decrement for up/down interface.
System supply voltage
Low terminal of DCP0.
High terminal of DCP0.
Wiper terminal of DCP0.
Device address for 2-wire bus.
Hardware write protect
Serial data input/output for 2-wire bus.
Device address for 2-wire bus.
Low terminal of DCP1.
High terminal of DCP1.
Wiper terminal DCP1.
System ground
Chip select for Up/Down interface.
Wiper terminal of DCP2.
High terminal of DCP2.
Low terminal of DCP2.
Serial clock for 2-wire bus.
DCP select for up/down interface.
Pin Descriptions
Bus Interface Pins
Serial Data Input/Output (SDA)
The SDA is a bidirectional serial data input/output pin for the
2-wire interface. It receives device address, operation code,
wiper register address and data from a 2-wire external master
device at the rising edge of the serial clock SCL, and it shifts
out data after each falling edge of the serial clock SCL.
SDA requires an external pull-up resistor, since it’s an open
drain output.
Serial Clock (SCL)
This input is the serial clock of the 2-wire and Up/Down
interface.
Device Address (A2-A0)
The Address inputs are used to set the least significant 3 bits of
the 8-bit 2-wire interface slave address. A match in the slave
address serial data stream must be made with the Address
input pins in order to initiate communication with the X9252. A
maximum of 8 devices may occupy the 2-wire serial bus.
Chip Select (CS)
When the CS pin is low, increment or decrement operations
are possible using the SCL and U/D pins. The 2-wire
interface is disabled at this time. When CS is high, the 2-wire
interface is enabled.
Up or Down Control (U/D)
The U/D input pin is held HIGH during increment operations
and held LOW during decrement operations.
DCP Select (DS1-DS0)
The DS1-DS0 select one of the four DCPs for an Up/Down
interface operation.
Hardware Write Protect Input (WP)
When the WP pin is set low, “write” operations to non volatile
DCP Data Registers are disabled. This includes both 2-wire
interface non-volatile “Write”, and Up/Down interface “Store”
operations.
DCP Pins
R_H0, R_L0, R_H1, R_L1, R_H2, R_L2, R_H3, and R_L3
These pins are equivalent to the terminal connections on
mechanical potentiometers. Since there are 4 DCPs, there is
one set of R_H and R_L for each DCP.
R_W0, R_W1, R_W2, and R_W3
The wiper pins are equivalent to the wiper terminal of
mechanical potentiometers. Since there are four DCPs,
there are 4 R_W pins.
3
FN8167.1
September 14, 2005