X5328 Datasheet, PDF (3/21 Pages) Intersil Corporation – CPU Supervisor with 32Kbit SPI EEPROM

X5328, X5329
Ordering Information (Continued)
PART NUMBER
RESET
(ACTIVE LOW)
X5328V14I-2.7A
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
X5329V14I-2.7A
PART
MARKING
V_CC RANGE
TEMP
(V)
V_TRIP RANGE RANGE (°C)
PACKAGE
2.7-5.5
2.85-3.0
-40 to 85 14 Ld TSSOP
X5328V14IZ-2.7A
(Note)
X5328V Z AP X5329V14IZ-2.7A
(Note)
X5329V Z AP
-40 to 85 14 Ld TSSOP
(Pb-free)
X5328P-2.7
X5328P F X5329P-2.7
X5329P F
2.7-5.5
2.55-2.7
0 to 70 8 Ld PDIP
X5328PZ-2.7 (Note) X5328P Z F X5329PZ-2.7 (Note) X5329P Z F
0 to 70 8 Ld PDIP (Pb-free)
X5328PI-2.7
X5328P G X5329PI-2.7
X5329P G
-40 to 85 8 Ld PDIP
X5328PIZ-2.7 (Note) X5328P Z G X5329PIZ-2.7 (Note) X5329P Z G
-40 to 85 8 Ld PDIP (Pb-free)
X5328S8-2.7*
X5328 F
X5329S8-2.7*
0 to 70 8 Ld SOIC
X5328S8Z-2.7* (Note) X5328 Z F X5329S8Z-2.7* (Note) X5329 Z F
0 to 70 8 Ld SOIC (Pb-free)
X5328S8I-2.7*
X5328 G
X5329S8I-2.7*
-40 to 85 8 Ld SOIC
X5328S8IZ-2.7* (Note) X5328 Z G X5329S8IZ-2.7* (Note) X5329 Z G
-40 to 85 8 Ld SOIC (Pb-free)
X5328V14-2.7*
X5329V14-2.7*
0 to 70 14 Ld TSSOP
X5328V14Z-2.7*
(Note)
X5328V Z F X5329V14Z-2.7*
(Note)
X5329V Z F
0 to 70
14 Ld TSSOP
(Pb-free)
X5328V14I-2.7*
X5329V14I-2.7*
-40 to 85 14 Ld TSSOP
X5328V14IZ-2.7*
(Note)
X5328V Z G X5329V14IZ-2.7*
(Note)
X5329V Z G
-40 to 85 14 Ld TSSOP
(Pb-free)
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3
FN8132.1
October 17, 2005