X5168_06 Datasheet, PDF (3/20 Pages) Intersil Corporation – CPU Supervisor with 16Kbit SPI EEPROM

X5168, X5169
Ordering Information (Continued)
PART NUMBER
RESET
(ACTIVE LOW)
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
PART
V_CC RANGE V_TRIP RANGE
TEMP
MARKING
(V)
(V)
RANGE (°C)
PACKAGE
PKG.
DWG #
X5168V14-2.7A X5168V AN X5169V14-2.7A X5168V AN
2.7-5.5
2.85-3.0
0 to 70 14 Ld TSSOP M14.173
X5168V14Z-2.7A X5168V Z AN X5169V14Z-2.7A X5169V Z AN
(Note)
(Note)
0 to 70
14 Ld TSSOP M14.173
(Pb-free)
X5168V14I-2.7A X5168V AP X5169V14I-2.7A X5169V AP
-40 to 85 14 Ld TSSOP M14.173
X5168V14IZ-2.7A X5168V Z AP X5169V14IZ-2.7A X5169V Z AP
(Note)
(Note)
-40 to 85 14 Ld TSSOP M14.173
(Pb-free)
X5168P-2.7
X5168P F X5169P-2.7
X5169P F
2.7-5.5
2.55-2.7
0 to 70 8 Ld PDIP MDP0031
X5168PZ-2.7
(Note)
X5168P Z F X5169PZ-2.7
(Note)
X5169P Z F
8 Ld PDIP** MDP0031
(Pb-free)
X5168PI-2.7
X5168P G X5169PI-2.7
X5169P G
-40 to 85 8 Ld PDIP MDP0031
X5168PIZ-2.7
(Note)
X5168P Z G X5169PIZ-2.7
(Note)
X5169P Z G
8 Ld PDIP** MDP0031
(Pb-free)
X5168S8-2.7* X5168 F
X5169S8-2.7* X5169 F
0 to 70 8 Ld SOIC MDP0027
X5168S8Z-2.7* X5168 Z F
(Note)
X5169S8Z-2.7* X5169 Z F
(Note)
8 Ld SOIC
(Pb-free)
MDP0027
X5168S8I-2.7* X5168 G
X5169S8I-2.7* X5169 G
-40 to 85 8 Ld SOIC MDP0027
X5168S8IZ-2.7* X5168 Z G X5169S8IZ-2.7* X5169 Z G
(Note)
(Note)
8 Ld SOIC
(Pb-free)
MDP0027
X5168V14-2.7* X5168V F X5169V14-2.7* X5169V F
0 to 70 14 Ld TSSOP M14.173
X5168V14Z-2.7* X5168V Z F X5169V14Z-2.7* X5169V Z F
(Note)
(Note)
0 to 70
14 Ld TSSOP M14.173
(Pb-free)
X5168V14I-2.7* X5168V G X5169V14I-2.7* X5168V G
-40 to 85 14 Ld TSSOP M14.173
X5168V14IZ-2.7* X5168V Z G X5169V14IZ-2.7* X5168V Z G
(Note)
(Note)
-40 to 85 14 Ld TSSOP M14.173
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add "-T1" suffix for tape and reel.
**Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
Pin Configuration
8 LD SOIC/PDIP
CS
1 ^X5168/X5169 8
V_CC
SO
2
7
RESET/RESET
WP
3
6
SCK
V_SS
4
5
SI
CS
SO
NC
NC
NC
WP
V_SS
14 LD TSSOP
X5168/X5169
1
14
2
13
3
12
4
11
5
10
6
9
7
8
V_CC
RESET/RESET
NC
NC
NC
SCK
SI
3
FN8130.2
June 15, 2006