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ISL78208 Datasheet, PDF (3/25 Pages) Intersil Corporation – Wide VIN Dual Standard Buck Regulator with 3A/3A Continuous Output Current
Pin Configuration
ISL78208
ISL78208
(32 LD WFQFN)
TOP VIEW
32 31 30 29 28 27 26 25
FB1 1
SS1 2
PGND1 3
NC1 4
BOOT1 5
PHASE1 6
PHASE1 7
NC2 8
24 FB2
23 SS2
22 PGND2
PD
21 NC5
20 BOOT2
19 PHASE2
18 PHASE2
17 NC4
9 10 11 12 13 14 15 16
Pin Descriptions
PIN NUMBER
25, 32
1, 24
2, 23
3, 22
5, 20
6, 7, 18, 19
9, 10, 15, 16
11, 13
SYMBOL
COMP2, COMP1
FB1, FB2
SS1, SS2
PGND1, PGND2
BOOT1, BOOT2
PHASE1, PHASE2
VIN1, VIN2
EN1, EN2
PIN DESCRIPTION
COMP1/COMP2 is the output of the error amplifier.
Feedback pin for the regulator. FB is the negative input to the voltage loop error amplifier. COMP is the
output of the error amplifier. The output voltage is set by an external resistor divider connected to FB.
In addition, the PWM regulator’s power-good and undervoltage protection circuits use FB1/2 to monitor the
regulator output voltage.
Soft-Start pins for each controller. The SS1/2 pins control the soft-start and sequence of their respective
outputs. A single capacitor from the SS pin to ground determines the output ramp rate. See the “Output
Tracking and Sequencing” on page 15 for soft-start and output tracking/sequencing details. If SS pins are
tied to VCC, an internal soft-start of 2ms will be used. Maximum CSS value is 50nF.
Power ground connections. Connect directly to the system GND plane.
Floating bootstrap supply pin for the power MOSFET gate driver. The bootstrap capacitor provides the
necessary charge to turn on the internal N-Channel MOSFET. Connect an external capacitor from this pin to
PHASE.
Switch node output. It connects the source of the internal power MOSFET with the external output inductor
and with the cathode of the external diode.
The input supply for the power stage of the PWM regulator and the source for the internal linear regulator
that provides bias for the IC. Place a minimum of 10µF ceramic capacitance from each VIN to GND and
close to the IC for decoupling.
PWM controller’s enable inputs. The PWM controllers are held off when the pin is pulled to ground. When
the voltage on this pin rises above 2V, the PWM controller is enabled. If EN1, EN2 pins are driven by an
external signal, the minimum off-time for EN1, EN2 should be:
EN_T_off (μs) = 10μs • CSS ⁄ 2.2nF
where CSS is the soft-start pin capacitor (nF). ISL78208 does not have debouncing to EN1, EN2 external
signals.
3
FN8354.0
July 12, 2013