ISL75051SRH Datasheet, PDF (3/15 Pages) Intersil Corporation – 3A, Rad Hard, Positive, Ultra Low Dropout Regulator

Pin Configuration
ISL75051SRH
ISL75051SRH
(18LD CDFP)
TOP VIEW
GND
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VADJ
BYP
1
18
2
17
3
16
4
15
5
GND ¹⁴
6
13
7
12
8
11
9
10
PG
VIN
VIN
VIN
VIN
VIN
VIN
OCP
EN
Pin Descriptions
PIN NUMBER
12, 13, 14
15, 16, 17
18
1
2, 3, 4
5, 6, 7
8
9
10
11
Top Lid
PIN NAME
V_IN
PG
GND
V_OUT
VADJ
BYP
EN
OCP
GND
Input supply pins
DESCRIPTION
V_OUT in regulation signal. Logic low defines when V_OUT is not in regulation. Must be grounded if not used.
GND pin
Output voltage pins
VADJ pin allows V_OUT to be programmed with an external resistor divider.
To filter the internal reference, connect a 0.1µF capacitor from BYP pin to GND.
V_IN independent chip enable. TTL and CMOS compatible.
Allows current limit to be programmed with an external resistor.
The top lid is connected to GND pin of the package.
3
FN7610.1
November 4, 2011