ISL59832 Datasheet, PDF (3/14 Pages) Intersil Corporation – Dual Channel, Single Supply Video Reconstruction Filter with Charge Pump

ISL59832
Electrical Specifications V_S = V_CP = 3.3V, C_F = 0.1µF, C_S = 0.22µF, C_FIL = 0.4µF, C_IN1 = C_IN2 = 0.1µF, R_L1 = R_L2 = 150Ω,
Typical T_A = +27°C. (Continued)
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
(Note 2) TYP (Note 2)
I_CLAMP
Clamp Restore Current
V_SLICE
Sync Detect Threshold
PSRR_DC
Power Supply Rejection
AC CHARACTERISTICS
Force V_IN = -0.3V, Channel 1
Force V_IN = 1V, Channel 2
Force V_IN = -0.3V, Channel 2
Channel 1
VS = +3.0 to +3.6
-5
-2.5
135
180
-200
-160
100
200
50
77
A_PB
Passband Flatness
f = 5MHz, relative to 100kHz
0
0.8
1.25
A_SB
Stopband Attenuation
f ≥ 27MHz relative to 100kHz
-50
-35
dG
Differential Gain
11-step modulated staircase
0.45
UNIT
mA
µA
µA
mV
dB
dB
dB
%
dP
Differential Phase
11-step modulated staircase
-0.15
°
SNR
GD_MATCH
ΔGD
Signal To Noise Ratio
DC Group Delay Match
Group Delay Deviation
Peak signal (1.4V_P-P) to RMS noise,
f = 10kHz to 10MHz
Channel-to-channel group delay
matching at 100kHz
Deviation from 100kHz to 3.58MHz
66
dB
0.1
ns
8
ns
PSRR
Power Supply Rejection
V_IN = 100mV_P-P sine wave, f = 100kHz to
35
dB
5MHz
X_TALK
Channel-to-Channel Crosstalk
f = 100kHz to 5MHz
-60
dB
V_NOISE
Input Voltage Noise
0.66
mV_RMS
LOGIC (ENABLE, SYNC_IN)
V_IL
V_IH
I_I
CHARGE PUMP
Logic Low Input Voltage
Logic High Input Voltage
Logic Input Current
f_CP
Charge Pump Clock Frequency
0.8
V
2.0
V
-1
1
µA
12.5
MHz
3
FN6267.1
June 11, 2008