ISL59832 Datasheet, PDF (13/14 Pages) Intersil Corporation – Dual Channel, Single Supply Video Reconstruction Filter with Charge Pump

ISL59832
Power Dissipation
With the high output drive capability of the ISL59832, it is
possible to exceed the +150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
PD_MAX
=
T_{----J---M-----A----X-----–-----}T_{----A---M-----A----X--}
Θ_JA
(EQ. 1)
Where:
T_JMAX = Maximum junction temperature
T_AMAX = Maximum ambient temperature
Θ_JA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
PD_MAX
=
V_S
×
I_SMAX
+
(V_S
–
V_OUTi)
×
-^V----^O----^U----^T----ⁱ
R_Li
(EQ. 2)
for sinking:
PD_MAX = V_S × I_SMAX + (V_OUTi – V_S) × I_LOADi
(EQ. 3)
By setting Equation 1 equal to Equation 2 and 3, we can
solve for the output current and R_LOAD values needed to
avoid exceeding the maximum junction temperature.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Strip
line design techniques are recommended for the input and
output signal traces to help control the characteristic
impedance. Furthermore, the characteristic impedance of
the traces should be 75Ω. Trace lengths should be as short
as possible between the output pin and the series 75Ω
resistor. The power supply pin must be well bypassed to
reduce the risk of oscillation. For normal single supply
operation, a single 4.7µF tantalum capacitor in parallel with a
0.1µF ceramic capacitor from V_S and V_CP to GND will
suffice.
The AC performance of this circuit depends greatly on the
care taken in designing the PC board. The following are
recommendations to achieve optimum high frequency
performance from your PC board.
• Use low inductance components, such as chip resistors
and chip capacitors whenever possible.
• Minimize signal trace lengths. Trace inductance and
capacitance can easily limit circuit performance. Avoid
sharp corners; use rounded corners when possible. Vias
in the signal lines add inductance at high frequency and
should be avoided. PCB traces longer than 1" begin to
exhibit transmission line characteristics with signal rise/fall
times of 1ns or less. To maintain frequency performance
with longer traces, use striplines.
Where:
V_S = Supply voltage
I_SMAX = Maximum quiescent supply current
V_OUT = Maximum output voltage of the application
R_LOAD = Load resistance tied to ground
I_LOAD = Load current
i = Number of output channels
• Match channel-to-channel analog I/O trace lengths and
layout symmetry. This will minimize propagation delay
mismatches.
• Route all signal I/O lines over continuous ground planes
(i.e. no split planes or PCB gaps under these lines).
• Place termination resistors in their optimum location as
close to the device as possible.
• Use good quality connectors and cables, matching cable
types and keeping cable lengths to a minimum when
testing.
• Place flying and output capacitor as close to the device as
possible for the charge pump.
• Decouple well, using a minimum of 2 power supply
decoupling capacitors, placed as close to the device as
possible. Avoid vias between the capacitor and the device
because vias adds unwanted inductance. Larger caps may
be farther away. When vias are required in a layout, they
should be routed as far away from the device as possible.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN6267.1
June 11, 2008