ISL1902 Datasheet, PDF (3/25 Pages) Intersil Corporation – Full-Featured, Dimmable AC Mains LED Driver with PFC

ISL1902
Pin Descriptions (Continued)
PIN # SYMBOL
DESCRIPTION
17 LREF The non-inverting input to the uncommitted linear amplifier.
18 LOUT Output of the uncommitted linear amplifier.
19
OVP Input to detect an overvoltage (OV) condition on the output with a nominal threshold of 1.5V. Since the control variable is output
current, a fault that results in an open circuit will cause excessive output voltage. The circuit hysteresis is a switched current source
that is active when the OV threshold is exceeded.
20
AC Input to sense AC voltage presence and amplitude. A resistor divider from line and neutral/line and circuit ground is used to detect
the AC voltage.
21 GND Signal and power ground connections for this device. Due to high peak currents and high frequency operation, a low impedance
layout is necessary. Ground planes and short traces are highly recommended.
22 INRUSH Output to drive an isolation transformer to control an inrush current limiting device. Typically this would be a triac, back-to-back FETs,
or anti-parallel SCRs, etc. The output is a 50% duty cycle ~80kHz square-wave capable of sourcing 10mA. The output is enabled in
conjunction with an AC outage (such as from a wall dimmer). Operation is delayed for ~150µs after AC returns and is enabled until
AC is interrupted again. The INRUSH output is also inhibited during normal AC zero-crossing even at full conduction angle.
23 PWMOUT The PWM gate drive output for LED dimming. The output level is clamped to ~12V for V_DD greater than 12V. PWMOUT has pull-down
capability when UVLO is active or when the IC is not biased. This output is used to drive the dimming FET in series with the LED string.
The PWM operates at ~310Hz.
24
OUT The gate drive output for the external power FET. OUT is capable of sourcing and sinking 1A @ V_DD = 8V. The output level is clamped
to ~12V for V_DD greater than 12V. OUT has pull-down capability when UVLO is active or when the IC is not biased.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG. DWG.
#
ISL1902FAZ
ISL 1902FAZ
-40 to +125
24 Ld QSOP
M24.15
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL1902. For more information on MSL please see tech brief TB363.
3
FN7981.2
March 20, 2013