ISL1902 Datasheet, PDF (22/25 Pages) Intersil Corporation – Full-Featured, Dimmable AC Mains LED Driver with PFC

ISL1902
RS
CS+ _DIFFERENTIAL
CS - IOUT
IOUT
CS-
PROCESSOR
AC
VERR
RPU
VREF
REFERENCE
GENERATOR
EA1
_
EA2
_
ISL1902
LPOUT
REFIN
FB1
FB2
CFB2
R3 R1
RFB1
RFB2
R4
R2
CF1 CF2
CFB1
FIGURE 30. CONTROL LOOP CONFIGURATION
In applications requiring PFC, the fast loop bandwidth can be set
to react to line transients without affecting steady state
operation. For example, the slow loop requires IOUT to be filtered
with a time constant of 50ms to 100ms. The fast loop (to be
effective), requires less filtering on IOUT and requires a
bandwidth three orders of magnitude (1000x) higher with a 60%
divider weighting compared to the slow loop (taking into account
the peak-to-average ratio of a sinusoid).
FILTERED IOUT FAST LOOP
FILTERED IOUT SLOW LOOP
1.2
1.0
0.8
0.6
0.4
0.2
0
0
2
4
6
8
10
12
14
TIME/ms
IOUT FILTERING
2ms/DIV
FIGURE 31. IOUT FILTERED WAVEFORMS (100Hz)
OVP
The ISL1902 has independent overvoltage protection accessed
through the OV pin. There is a nominal 20µA switched current
source used to create hysteresis. The current source is active only
during an OV fault; otherwise, it is inactive and does not affect
the node voltage. The magnitude of the hysteresis voltage is a
function of the external resistor divider impedance.
MONITORED
VOLTAGE
COPT
R1
R3
R2
VREF
20µA
10
1.5V ^_
FIGURE 32. OV HYSTERESIS
V_{ov(ri sing)}
=
1.5
⋅
(_---R_-----1_-----+----R_-----2_----)
R2
V
(EQ. 30)
If the divider formed by R1 and R2 is sufficiently high
impedance, R3 is not required, and the hysteresis is:
ΔV = 20 ⋅ 10^–6 ⋅ R1
V
(EQ. 31)
If that does not result in the desired hysteresis then R3 is
needed, and the hysteresis is:
ΔV
=
20
⋅
10^–6
⋅
⎛
⎝
R
1
+
R
3
⋅
(_---R_-----1_--R---+--2--R_-----2_----)⎠⎞
V
(EQ. 32)
If the OV signal requires filtering, the filter capacitor, C_OPT, should
be placed as shown in Figure 17. The current hysteresis provides
great flexibility in setting the magnitude of the hysteresis voltage,
but it is susceptible to noise due to its high impedance. If the
hysteresis was implemented as a fixed voltage instead, the
signal could be filtered with a small capacitor placed between
the OV pin and signal ground. This technique does not work well
when the hysteresis is a current source because a current source
takes time to charge the filter capacitor. There is no
instantaneous change in the threshold level rendering the
current hysteresis ineffective. To remedy the situation, the filter
capacitor must be separated from the OV pin by R3. The
capacitor and R3 must be physically close to the OV pin.
OFFREF Control
The ISL1902 provides the ability to disable the output based on
the level of the control loop reference, REFIN. Setting OFFREF to
a voltage between 0 and 0.6V determines the threshold voltage
that disables the output.
REFIN(off) = OFFREF – 0.100 V
(EQ. 33)
OFFREF allows the designer to disable the output at a
predetermined load current to prevent undesirable behavior,
such as at light loading conditions when there may be
insufficient current to maintain the holding current in a
triac-based dimmer. Setting OFFREF to less than 100mV disables
this feature. OFFREF has a nominal hysteresis of 50mV.
22
FN7981.2
March 20, 2013