CD4051BMS Datasheet, PDF (3/12 Pages) Intersil Corporation – CMOS Analog Multiplexers/Demultiplexers

CD4051BMS, CD4052BMS, CD4053BMS
Functional Diagrams (Continued)
X CHANNELS IN/OUT
3210
11 15 14 12
TG
16 VDD
TG
*
A 10
*
B9
LOGIC
LEVEL
CONVERSION
BINARY
TO
1 OF 4
DECODER
WITH
INHIBIT
TG
COMMON X
OUT/IN
TG
13
TG
3
COMMON Y
TG
OUT/IN
*
INH 6
8 VSS
LOGIC
LEVEL
CONVERSION
*
A 11
*
B 10
*
C9
*
INH 6
TG
7 VEE
TG
1524
0123
Y CHANNELS IN/OUT
CD4052BMS
VDD
* ALL INPUTS PROTECTED BY
STANDARD CMOS PROTECTION
NETWORK
VSS
BINARY TO 1 OF 2
DECODERS WITH
INHIBIT
16 VDD
IN/OUT
cy cx by bx ay ax
3 5 1 2 13 12
OUT/IN
TG
ax or ay
14
TG
OUT/IN
TG
bx or by
15
TG
OUT/IN
TG
cx or cy
4
TG
8 VSS
7 VEE
CD4053BMS
7-939