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5962F-9568901VXC Datasheet, PDF (3/4 Pages) Intersil Corporation – Radiation Hardened Quad Differential Line Receiver
HS-26C32RH, HS-26C32EH
Propagation Delay Load Circuit
DUT
CL
TEST
POINT
RL
Three-State Low Load Circuit
VDD
DUT
RL
TEST
POINT
CL
CL = 50pF
RL = 1000Ω
Three-State High Timing
Diagrams
VIH
VSS
VOH
VOZ
VS
INPUT
tPZH
VT
tPHZ
OUTPUT
VW
TABLE 1. THREE-STATE LOW VOLTAGE LEVELS
PARAMETER
HS-26C32RH
HS-26C32EH
UNITS
VDD
VIH
VS
VT
VW
GND
4.50
V
4.50
V
2.25
V
50
%
VOL + 0.5
V
0
V
CL = 50pF
RL = 1000Ω
TABLE 2. THREE-STATE HIGH VOLTAGE LEVELS
PARAMETER
HS-26C32RH
HS-26C32EH
UNITS
VDD
VIH
VS
VT
VW
GND
4.50
V
4.50
V
2.25
V
50
%
VOH - 0.5
V
0
V
Three-State High Load Circuit
DUT
TEST
POINT
CL
RL
CL = 50pF
RL = 1000Ω
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in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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3
FN3402.5
May 28, 2013