ISL6316 Datasheet, PDF (25/29 Pages) Intersil Corporation – Enhanced 4-Phase PWM Controller with 6-Bit VID Code Capable of Precision RDS(ON) or DCR Differential Current Sensing for VR10 Application

ISL6316
C₂ (OPTIONAL)
R_C ^CC
COMP
R_FB
+
V_DROOP
-
FB
IDROOP
VDIFF
C₂
R_C ^CC
COMP
FB
C₁
R₁
R_FB
IDROOP
VDIFF
FIGURE 19. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6316 CIRCUIT
The feedback resistor, R_FB, has already been chosen as
outlined in Load-Line Regulation Resistor. Select a target
bandwidth for the compensated system, f₀. The target
bandwidth must be large enough to assure adequate transient
performance, but smaller than 1/3 of the per-channel
switching frequency. The values of the compensation
components depend on the relationships of f₀ to the L-C pole
frequency and the ESR zero frequency. For each of the three
cases which follow, there is a separate set of equations for the
compensation components.
Case 1:
---------1----------
2π LC
>
f₀
R_C
=
R_F
B
2----π_{----f--0---V-----P-------P--------L----C--}
0.75 V _{I N}
C_C = _2----π----V-0---._P--7--_--5-_P---V-R---^I--_FN----_B---f--₀--
Case 2:
---------1----------
2π LC
≤
f₀
<
2----π^----C-----(^{-1-E-----S----R-----})
R_C
=
R_FB
V-----_{P-------P----}(_--2----π_----)_--²_-----f-0--²_{----L----C---}
0.75 V_IN
C_C
=
---------------------0----.-7----5----V----^I--^N-----------------------
(2π)² f₀₂ V_P-PR_FB LC
(EQ. 32)
Case 3:
f₀ > _2----π----C-----₍-1-E-----S----R-----₎
R_C
=
R_FB
------2----^π----f--⁰----V----^P----^---^P----L-------
0.75 V_IN (ESR)
C_C
=
0----.--7---5----V----_I--N----(_{--E-----S----R-----})_-------C---
2πV_P-PR_FBf₀ L
FIGURE 20. COMPENSATION CIRCUIT FOR ISL6316 BASED
CONVERTER WITHOUT LOAD-LINE
REGULATION
In Equation 32, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V_P-P is the peak-to-
peak sawtooth signal amplitude as described in Figure 7 and
Electrical Specifications.
The optional capacitor C₂, is sometimes needed to bypass
noise away from the PWM comparator (see Figure 20). Keep
a position available for C₂, and be prepared to install a high-
frequency capacitor of between 22pF and 150pF in case any
leading-edge jitter problem is noted.
Once selected, the compensation values in Equation 32
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R_C. Slowly increase the
value of R_C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
C_C will not need adjustment. Keep the value of C_C from
Equation 32 unless some performance issue is noted.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 20, provides the
necessary compensation.
The first step is to choose the desired bandwidth, f₀, of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
an extra high-frequency pole, f_HF. This pole can be used for
added noise rejection or to assure adequate attenuation at the
error-amplifier high-order pole and zero frequencies. A good
general rule is to choose f_HF = 10f₀, but it can be higher if
desired. Choosing f_HF to be lower than 10f₀ can cause
problems with too much phase shift below the system
bandwidth.
25
FN9227.0
August 31, 2005