English
Language : 

ISL6261 Datasheet, PDF (25/34 Pages) Intersil Corporation – Single-Phase Core Regulator for IMVP-6 Mobile CPUs
ISL6261
Typical Performance (Data Taken on ISL6261 Eval1 Rev. C Evaluation Board) (Continued)
5V/div
0.2V/div
0.2V/div
5V/div
10V/div
FIGURE 25. VBOOT TO VID, VIN = 19V, Io = 2A, VID = 1.5V,
Ch1: PGD_IN, Ch2: Vo, Ch3: CLK_EN#,
Ch4: PHASE
5V/div
5V/div
5V/div
FIGURE 26. VBOOT TO VID, VIN = 19V, Io = 2A, VID = 0.7625V,
Ch1: PGD_IN, Ch2: Vo, Ch3: PGOOD,
Ch4: CLK_EN
5V/div
0.5V/div
5V/div
7.5ms
10V/div
FIGURE 27. CLK_EN AND PGOOD ASSERTION DELAY,
VIN=19V, Io=2A, VID=1.1V, Ch1: CLK_EN#,
Ch2: Vo, Ch3: PGOOD, Ch4: PHASE
FIGURE 28. SHUT DOWN, VIN = 19V, Io = 0.5A, VID = 1.5V,
Ch1: VR_ON, Ch2: Vo, Ch3: PGOOD,
Ch4: PHASE
FIGURE 29. SOFT START INRUSH CURRENT, VIN = 19V,
Io = 0.5A, VID = 1.1V, Ch1: DROOP-VO
(2.1mV = 1A), Ch2: Vo, Ch3: Vcomp, Ch4: PHASE
25
FIGURE 30. VIN TRANSIENT TEST, VIN = 8Æ19V, Io = 2A,
VID = 1.1V, Ch1: Vo, Ch3: VIN, Ch4: PHASE
FN9251.1
September 27, 2006