ISL6227_07 Datasheet, PDF (23/28 Pages) Intersil Corporation – Dual Mobile-Friendly PWM Controller with DDR Option

ISL6227
Selection of the Input Capacitor
When the upper MOSFET is on, the current in the output
inductor will be seen by the input capacitor. Even though this
current has a triangular shape top, its RMS value can be
fairly approximated by:
lin_rms(V_IN) = D(V_IN)*I_load
(EQ.24)
This RMS current includes both DC and AC components.
Since the DC component is the product of duty cycle and
load current, the AC component can be approximated by:
li_nac(V_IN) = (D(V_IN) – D(V_IN)²)I_load
(EQ.25)
AC components will be provided from the input capacitor.
The input capacitor has to be able to handle this ripple
current without overheating and with tolerable voltage ripple.
In addition to the capacitance, a ceramic capacitor is
generally used between the drain terminal of the upper
MOSFET and the source terminal of the lower MOSFET, in
order to clamp the parasitic voltage ringing at the phase
node in switching.
Choosing MOSFETs
For a notebook battery with a maximum voltage of 24V, at
least a minimum 30V MOSFETs should be used. The design
has to trade off the gate charge with the r_DS(ON) of the
MOSFET:
• For the lower MOSFET, before it is turned on, the body
diode has been conducting. The lower MOSFET driver will
not charge the miller capacitor of this MOSFET.
• In the turning off process of the lower MOSFET, the load
current will shift to the body diode first. The high dv/dt of
the phase node voltage will charge the miller capacitor
through the lower MOSFET driver sinking current path.
This results in much less switching loss of the lower
MOSFETs.
The duty cycle is often very small in high battery voltage
applications, and the lower MOSFET will conduct most of
the switching cycle; therefore, the lower the r_DS(ON) of the
lower MOSFET, the less the power loss. The gate charge for
this MOSFET is usually of secondary consideration.
The upper MOSFET does not have this zero voltage
switching condition, and because it conducts for less time
compared to the lower MOSFET, the switching loss tends to
be dominant. Priority should be given to the MOSFETs with
less gate charge, so that both the gate driver loss, and
switching loss, will be minimized.
For the lower MOSFET, its power loss can be assumed to be
the conduction loss only.
P_lower(V_IN) ≈ (1 – D(V_IN))I_load2r_DS(ON)Lower
(EQ.26)
For the upper MOSFET, its conduction loss can be written
as:
P_uppercond(V_IN) = D(V_IN)I_load2R_DS(ON)upper
(EQ.27)
and its switching loss can be written as:
P_uppersw(V_IN)
=
V_{-----I--N----}I_{--v---a---l--l-y---}T_{----o----n---}F_----s---w--
2
+
-^V----^I--^N----^I--^p---^e---^a----^k---^T----^o---^f--^f--^F----^s---^w--
2
(EQ.28)
The peak and valley current of the inductor can be obtained
based on the inductor peak-to-peak current and the load
current. The turn-on and turn-off time can be estimated with
the given gate driver parameters in the Electrical
Specification Table on page 3. For example, if the gate driver
turn-on path of MOSFET has a typical on-resistance of 4Ω,
its maximum turn-on current is 1.2A with 5V Vcc. This
current would decay as the gate voltage increased. With the
assumption of linear current decay, the turn-on time of the
MOSFETs can be written with:
T_on
=
--²---^Q-----^g----^d--
I_driver
(EQ.29)
Q_gd is used because when the MOSFET drain-to-source
voltage has fallen to zero, it gets charged. Similarly, the turn-
off time can be estimated based on the gate charge and the
gate drivers sinking current capability.
The total power loss of the upper MOSFET is the sum of the
switching loss and the conduction loss. The temperature rise
on the MOSFET can be calculated based on the thermal
impedance given on the datasheet of the MOSFET. If the
temperature rise is too much, a different MOSFET package
size, layout copper size, and other options have to be
considered to keep the MOSFET cool. The temperature rise
can be calculated by:
T_rise = θ_jaP_{totalpower loss}
(EQ.30)
The MOSFET gate driver loss can be calculated with the
total gate charge and the driver voltage Vcc. The lower
MOSFET only charges the miller capacitor at turn-off.
P_driver = V_ccQ_gsF_sw
(EQ.31)
Based on the above calculation, the system efficiency can
be estimated by the designer.
23
FN9094.4
December 21, 2006