ISL12029_1012 Datasheet, PDF (23/29 Pages) Intersil Corporation – Real Time Clock/Calendar with I2C Bus™ and EEPROM

ISL12029, ISL12029A
Application Section
Crystal Oscillator and Temperature Compensation
Intersil has now integrated the oscillator compensation
circuity on-chip, to eliminate the need for external
components and adjust for crystal drift over-temperature and
enable very high accuracy time keeping (<5ppm drift).
has 6 bits of control. The load capacitance range covered by
the ATR circuit is approximately 3.25pF to 18.75pF, in
0.25pF increments. Note that actual capacitance would also
include about 2pF of package related capacitance. In-circuit
tests with commercially available crystals demonstrate that
this range of capacitance allows frequency control from
+116ppm to -37ppm, using a 12.5pF load crystal.
The Intersil RTC family uses an oscillator circuit with on-chip
crystal compensation network, including adjustable
load-capacitance. The only external component required is
the crystal. The compensation network is optimized for
operation with certain crystal parameters, which are
common in many of the surface mount or tuning-fork crystals
available today. Table 9 summarizes these parameters.
Table 10 contains some crystal manufacturers and part
numbers that meet the requirements for the Intersil RTC
products.
The turnover-temperature in Table 9 describes the
temperature where the apex of the of the drift vs temperature
curve occurs. This curve is parabolic with the drift increasing
as (T-T0)². For an Epson MC-405 device, for example, the
turnover-temperature is typically +25°C, and a peak drift of
>110ppm occurs at the temperature extremes of -40 and
+85°C. It is possible to address this variable drift by adjusting
the load capacitance of the crystal, which will result in
predictable change to the crystal frequency. The Intersil RTC
family allows this adjustment over-temperature since the
devices include on-chip load capacitor trimming. This control
is handled by the Analog Trimming Register, or ATR, which
In addition to the analog compensation afforded by the
adjustable load capacitance, a digital compensation feature
is available for the Intersil RTC family. There are 3 bits
known as the Digital Trimming Register or DTR, and they
operate by adding or skipping pulses in the clock signal. The
range provided is ±30ppm in increments of 10ppm. The
default setting is 0ppm. The DTR control can be used for
coarse adjustments of frequency drift over-temperature or
for crystal initial accuracy correction.
A final application for the ATR control is in-circuit calibration
for high accuracy applications, along with a temperature
sensor chip. Once the RTC circuit is powered up with battery
backup, the IRQ/F_OUT output is set at 32.768kHz and
frequency drift is measured. The ATR control is then
adjusted to a setting which minimizes drift. Once adjusted at
a particular temperature, it is possible to adjust at other
discrete temperatures for minimal overall drift, and store the
resulting settings in the EEPROM. Extremely low overall
temperature drift is possible with this method. The Intersil
evaluation board contains the circuitry necessary to
implement this control.
TABLE 9. CRYSTAL PARAMETERS REQUIRED FOR INTERSIL RTCs
PARAMETER
MIN
TYP
MAX
UNITS
NOTES
Frequency
32.768
kHz
Frequency Tolerance
±100
ppm
Down to 20ppm if desired
Turnover-Temperature
20
25
30
°C
Typically the value used for most crystals
Operating Temperature Range
-40
85
°C
Parallel Load Capacitance
Equivalent Series Resistance
12.5
50
pF
kΩ
For best oscillator performance
MANUFACTURER
Citizen
Epson
Raltron
SaRonix
Ecliptek
ECS
Fox
TABLE 10. CRYSTAL MANUFACTURERS
PART NUMBER
CM201, CM202, CM200S
MC-405, MC-406
RSM-200S-A or B
32S12A or B
ECPSM29T-32.768K
ECX-306/ECX-306I
FSM-327
TEMP RANGE
(°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-10 to +60
-10 to +60
-40 to +85
+25°C FREQUENCY
TOLERANCE
(ppm)
±20
±20
±20
±20
±20
±20
±20
23
FN6206.10
December 16, 2010