ISL65426_07 Datasheet, PDF (22/22 Pages) Intersil Corporation – 6A Dual Synchronous Buck Regulator with Integrated MOSFETs

L50.5x10
50 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 7/06
5.00
A
PIN 1
INDEX AREA
A
B
ISL65426
0.10 M C A B
0.05 M C
4 0.25
43
42
0.50
50
1
PIN 1 INDEX AREA
(C 0.40)
A
TOP VIEW
0.15 (4X)
VIEW "A-A"
26
17
0.40±0.10
25
18
3.30
0.50x7=3.50 REF
4.20
BOTTOM VIEW
SEE DETAIL "X"
9.80
8.10
(46 x 0.50)
(50 x 0.25)
3.30
4.80
(50 x 0.60)
RECOMMENDED LAND PATTERN
MAX. 1.00
SIDE VIEW
0.10 C C
SEATING PLANE
0.08 C
C
0.2 REF
5
0.00 MIN.
0.05 MAX.
DETAIL "X"
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MM.
2. UNLESS OTHERWISE SPECIFIED TOLERANCE : DECIMAL ±0.05
ANGULAR ±2×
3. DIMENSIONING AND TOLERANCE PER ASME Y 14.5M-1994.
4. DIMENSION LEAD WIDTH APPLIES TO THE PLATED TERMINAL
AND IS MEASURED BETWEEN 0.23MM AND 0.28MM FROM
THE TERMINAL TIP.
5. TIEBAR SHOWN (if present) IS A NON-FUNCTIONAL FEATURE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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22
FN6340.2
February 21, 2007