English
Language : 

ISL6569A Datasheet, PDF (20/22 Pages) Intersil Corporation – Multi-Phase PWM Controller
ISL6569A
0.3
0.2
0.1
IC,PP = 0
IC,PP = 0.5 IO
IC,PP = 0.75 IO
0
0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE (VIN / VO)
FIGURE 16. NORMALIZED INPUT-CAPACITOR RMS CURRENT
vs DUTY CYCLE FOR 2-PHASE CONVERTER
Layout Considerations
The following multi-layer printed circuit board layout
strategies minimize the impact of board parasitics on
converter performance. The following sections highlight
some important practices which should not be overlooked
during the layout process.
Component Placement
Within the allotted implementation area, orient the switching
components first. The switching components are the most
critical because they switch large amounts of energy and
tend to generate large amounts of noise. How the switching
components are placed should also take into account power
dissipation. Align the output inductors and MOSFETs such
that space between the components is minimized while
creating the PHASE plane. Place the Intersil HIP660X
drivers as close as possible to the MOSFETs they control to
reduce the parasitics due to trace length between critical
driver input and output signals. If possible, duplicate the
same placement of switching components for each phase.
Next, place the input and output capacitors. Position one
high-frequency ceramic input capacitor next to each upper
MOSFET drain. Place the bulk input capacitors as close to
the upper MOSFET drains as dictated by the component
size and dimensions. Long distances between input
capacitors and MOSFET drains results in too much trace
inductance and a reduction in capacitor performance. Locate
the output capacitors between the inductors and the load,
while keeping them in close proximity around the
microprocessor socket.
The ISL6569A can be placed off to one side or centered
relative to the individual phase switching components.
Routing of sense lines and PWM signals will guide final
placement. Critical small signal components to place close
to the controller include the ISEN resistors, RT resistor,
feedback resistor, and compensation components.
Bypass capacitors for the ISL6569A and HIP660X driver
bias supplies must be placed next to their respective pins.
Stray trace parasitics will reduce their effectiveness.
Plane Allocation and Routing
Dedicate one solid layer, usually a middle layer, for a ground
plane. Make all critical component ground connections with
vias to this plane. Dedicate one additional layer for power
planes; breaking the plane up into smaller islands of
common voltage. Use the remaining layers for small signal
wiring.
Route PHASE planes of copper filled polygons on the top
and bottom once the switching component placement is set.
Size the trace width between the driver gate pins and the
MOSFET gates to carry 1A of current. When routing
components in the switching path, use short wide traces to
reduce the associated parasitics.
20
FN9092.2
December 29, 2004