ISL6327A Datasheet, PDF (20/29 Pages) Intersil Corporation – Enhanced 6-Phase PWM Controller with 8-Bit VID Code and Differential Inductor DCR or Resistor Current Sensing

ISL6327A
falling threshold will reset the controller. Cycling the VID
codes will not reset the controller.
Overcurrent Protection
ISL6327A has two levels of overcurrent protection. Each
phase is protected from a sustained overcurrent condition by
limiting its peak current, while the combined phase currents
are protected on an instantaneous basis.
In instantaneous protection mode, the ISL6327A utilizes the
sensed average current I_AVG to detect an overcurrent
condition. See “Channel-Current Balance” on page 12 for
more detail on how the average current is measured. The
average current is continually compared with a constant
85µA reference current as shown in Figure 9. Once the
average current exceeds the reference current, a
comparator triggers the converter to shutdown.
At the beginning of overcurrent shutdown, the controller
places all PWM signals in a high-impedance state within
20ns commanding the Intersil MOSFET driver ICs to turn off
both upper and lower MOSFETs. The system remains in this
state a period of 4096 switching cycles. If the controller is still
enabled at the end of this wait period, it will attempt a
soft-start. If the fault remains, the trip-retry cycles will
continue indefinitely (as shown in Figure 10) until either
controller is disabled or the fault is cleared. Note that the
energy delivered during trip-retry cycling is much less than
during full-load operation, so there is no thermal hazard
during this kind of operation.
For the individual channel overcurrent protection, the
ISL6327A continuously compares the sensed current signal
of each channel with the 120µA reference current. If one
channel current exceeds the reference current, ISL6327A
will pull PWM signal of this channel to low for the rest of the
switching cycle. This PWM signal can be turned on next
cycle if the sensed channel current is less than the 120µA
reference current. The peak current limit of individual
channel will not trigger the converter to shutdown.
OUTPUT CURRENT
0A
OUTPUT VOLTAGE
0V
2ms/DIV
FIGURE 10. OVERCURRENT BEHAVIOR IN HICCUP MODE.
f_SW = 500kHz
The overcurrent protection level for the above two OCP
modes can be adjusted by changing the value of current
sensing resistors. In addition, ISL6327A can also adjust the
average OCP threshold level by adjusting the value of the
resistor from IOUT to GND. This provides additional safety
for the voltage regulator.
Equation 15 can be used to calculate the value of the resistor
R_IOUT based on the desired OCP level I_{AVG, OCP2}.
R_IOUT
=
---------------²----------------
I_{AVG, OCP2}
(EQ. 15)
Current Sense Output
The ISL6327A has 2 current sense output pins IDROOP and
IOUT; They are identical. In typical application, IDROOP pin
is connected to FB pin for the application where load line is
required. IOUT pin was designed for load current
measurement. As shown in the typical application
schematics on page 4 and page 5, load current information
can be obtained by measuring the voltage at IOUT pin with a
resistor connecting IOUT pin to the ground. When the
programmable temperature compensation function of
ISL6327A is properly used, the output current at IOUT pin is
proportional to the load current as shown in Figure 11.
V_IOUT, 200mV/DIV
0A
50A
100A
FIGURE 11. VOLTAGE AT IOUT PIN WITH A NTC NETWORK
PLACED BETWEEN IOUT TO GROUND WHEN
LOAD CURRENT CHANGES
Thermal Monitoring (VR_HOT/VR_FAN)
There are two thermal signals to indicate the temperature
status of the voltage regulator: VR_HOT and VR_FAN. Both
VR_FAN and VR_HOT are open-drain outputs, and external
pull-up resistors are required. Those signals are valid only
after the controller is enabled.
VR_FAN signal indicates that the temperature of the voltage
regulator is high and more cooling airflow is needed.
VR_HOT signal can be used to inform the system that the
temperature of the voltage regulator is too high and the CPU
should reduce its power consumption. VR_HOT signal may
be tied to the CPU’s PROCHOT# signal.
20
FN6833.0
February 17, 2009