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ISL54100A Datasheet, PDF (20/21 Pages) Intersil Corporation – TMDS Regenerators with Multiplexers
ISL54100A, ISL54101A, ISL54102A
START Command
ISL5410xA Serial Bus
R/W
ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 0
A7
A6
A5
A4
A3
A2
A1
A0
START Command
ISL5410xA Serial Bus
R/W
ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 1
Signals the beginning of serial I/O
ISL5410xA Device Select Address Write
The first 7 bits of the first byte select the ISL5410xA on the 2-
wire bus at the address set by the ADDR[6:0} pins. R/W = 0,
indicating that the next transaction will be a write.
ISL5410xA Register Address Write
This sets the initial address of the ISL5410xA’s configuration
register for subsequent reading.
Ends the previous transaction and starts a new one
ISL5410xA Serial Bus Address Write
This is the same 7-bit address that was sent previously, however
the R/W bit is now a 1, indicating that the next transaction(s) will
be a read.
D7
D6
Signals from
the Host
SDA Bus
Signals from
the
ISL5410xA Register Data Read(s)
D5
D4
D3
D2
D1
D0 This is the data read from the ISL5410xA’s configuration register.
(Repeat if desired)
Note: The ISL5410xA’s Configuration Register’s address pointer
auto increments after each data read: repeat this step to read
multiple sequential bytes of data from the Configuration Register.
STOP Command
Signals the ending of serial I/O
R
S
T Serial Bus
A
R
Address
T
Register
Address
E
S
T Serial Bus
A
R
Address
T
Data
Read*
S
T
O
AP
C
a a a a a a a 0 AAAAAAAA a a a a a a a 1
K
A
A
C
C
A
C
d
d
d
d
d
d
d
d
K
K
K
* The data read step may be repeated to read
from the ISL5410xA’s Configuration Register
sequentially, beginning at the Register
Address written in the two steps previous.
FIGURE 18. CONFIGURATION REGISTER READ
20
FN6725.0
June 17, 2008