X9410_06 Datasheet, PDF (2/21 Pages) Intersil Corporation – Dual Digitally Controlled Potentiometer

X9410
Ordering Information
PART NUMBER
POTENTIOMETER
V_CC LIMITS ORGANIZATION TEMP RANGE
PART MARKING (V)
(kΩ)
(°C)
PACKAGE
PKG. DWG. #
X9410YS24I
X9410YS I
5 ±10%
2.5
-40 to 85 24 Ld SOIC (300 mil)
M24.3
X9410YS24IZ (Note)
X9410YS ZI
-40 to 85 24 Ld SOIC (300 mil) (Pb-free) MDP0027
X9410WP24I
X9410WP I
10
-40 to 85 24 Ld PDIP
E24.6
X9410WS24I*
X9410WS I
-40 to 85 24 Ld SOIC (300 mil)
M24.3
X9410WS24IZ* (Note) X9410WS ZI
-40 to 85 24 Ld SOIC (300 mil) (Pb-free) MDP0027
X9410WV24I*
X9410WV I
-40 to 85 24 Ld TSSOP (4.4mm)
MDP0044
X9410WV24IZ* (Note) X9410WV ZI
-40 to 85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
X9410YS24I-2.7
X9410YS G
2.7 to 5.5
2.5
-40 to 85 24 Ld SOIC (300 mil)
M24.3
X9410YS24IZ-2.7 (Note) X9410YS ZG
-40 to 85 24 Ld SOIC (300 mil) (Pb-free) MDP0027
X9410WP24I-2.7
X9410WP G
10
-40 to 85 24 Ld PDIP
E24.6
X9410WS24I-2.7*
X9410WS G
-40 to 85 24 Ld SOIC (300 mil)
M24.3
X9410WS24IZ-2.7* (Note) X9410WS ZG
-40 to 85 24 Ld SOIC (300 mil) (Pb-free) MDP0027
X9410WV24-2.7*
X9410WV F
0 to 70 24 Ld TSSOP (4.4mm)
MDP0044
X9410WV24Z-2.7* (Note) X9410WV ZF
0 to 70 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
X9410WV24I-2.7*
X9410WV G
-40 to 85 24 Ld TSSOP (4.4mm)
MDP0044
X9410WV24IZ-2.7* (Note) X9410WV ZG
-40 to 85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock.
Serial Input
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9410.
Chip Select (CS)
When CS is HIGH, the X9410 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9410, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
Device Address (A₀ - A₁)
The address inputs are used to set the least significant
2 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9410. A maximum of 4 devices may occupy the
SPI serial bus.
2
FN8193.2
October 12, 2006