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X9221A_14 Datasheet, PDF (2/15 Pages) Intersil Corporation – Dual Digitally Controlled Potentiometer
X9221A
Ordering Information
PART NUMBER
X9221AYS
X9221AYSZ (Note)
X9221AYSI*
X9221AYSIZ* (Note)
X9221AWS*
PART MARKING
X9221AYS
X9221AYS Z
X9221AYSI
X9221AYSI Z
X9221AWS
VCC LIMITS
(V)
5 ±10%
RTOTAL (k)
2
TEMP
RANGE (°C)
PACKAGE
0 to +70 20 Ld SOIC (300MIL)
0 to +70 20 Ld SOIC (300MIL) (Pb-Free)
-40 to +85 20 Ld SOIC (300MIL)
-40 to +85 20 Ld SOIC (300MIL) (Pb-Free)
10
0 to +70 20 Ld SOIC (300MIL)
PKG.
DWG. #
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
X9221AWSZ* (Note) X9221AWS Z
X9221AWSI*
X9221AWSI
X9221AWSIZ* (Note) X9221AWSI Z
X9221AUP
X9221AUP
X9221AUPZ (Note) X9221AUPZ
X9221AUPI
X9221AUPI
X9221AUPIZ (Note) X9221AUPIZ
X9221AUSI*
X9221AUSI
X9221AUSIZ* (Note) X9221AUSI Z
0 to +70 20 Ld SOIC (300MIL) (Pb-Free) MDP0027
-40 to +85 20 Ld SOIC (300MIL)
MDP0027
-40 to +85 20 Ld SOIC (300MIL) (Pb-Free) MDP0027
50
0 to +70 20 Ld PDIP
MDP0031
0 to +70 20 Ld PDIP (Pb-Free)
MDP0031
-40 to +85 20 Ld PDIP
MDP0031
-40 to +85 20 Ld PDIP (Pb-Free)
MDP0031
-40 to +85 20 Ld SOIC (300MIL)
MDP0027
-40 to +85 20 Ld SOIC (300MIL) (Pb-Free) MDP0027
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and
100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
PIN DESCRIPTIONS
Potentiometer Pins
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9221A.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs. An open drain output requires
the use of a pull-up resistor. For selecting typical val-
ues, refer to the guidelines for calculating typical val-
ues on the bus pull-up resistors graph.
Address
The Address inputs are used to set the least signifi-
cant 4 bits of the 8-bit slave address. A match in the
slave address serial data stream must be made with
the Address input in order to initiate communication
with the X9221A
VH/RH(VH0/RH0-VH1/RH1), VL/RL (VL0/RL0-VL1/RL1)
The VH/RH and VL/RL inputs are equivalent to the ter-
minal connections on either end of a mechanical
potentiometer.
VW/RW (VW0/RW0-VW1/RW1)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
PIN CONFIGURATION
VW0/RW0
VL0/RL0
VH0/RL0
A0
A2
VW1/RW1
VL1/RL1
VH1/RH1
SDA
VSS
DIP/SOIC
1
20
2
19
3
18
4
17
5 X9221A 16
6
15
7
14
8
13
9
12
10
11
VCC
RES
RES
RES
A1
A3
SCL
RES
RES
RES
2
FN8163.2
August 30, 2006