ISL6524 Datasheet, PDF (2/16 Pages) Intersil Corporation – VRM8.5 PWM and Triple Linear Power System Controller

Block Diagram
DRIVE3
DRIVE4
VSEN4
FIX
DRIVE2
VSEN2
VSEN3
VSEN1
OCSET
VCC
VAUX
1.5V or 1.26V
EA3
-
+
+
-
EA4
x0.75
x0.75
+ _{1.8V or 1.26V}
-
- ^UV3
+
+ ^UV4
-
x 1.10
x 0.90
x0.90
+
1.2V
-
UV2
SET
Q
CLK
QD
CLR
INHIBIT
-
+ _EA2
x 1.15
OV
SOFT-
START
AND FAULT
LOGIC
FAULT
VCC
OSCILLATOR
28µA
4.5V
28µA
4.5V
POWER-ON
RESET (POR)
+
200µA
-
+
-
+
-
OC
+
-
VCC
DRIVE1
+
-
EA1
DACOUT
+
-
PWM
COMP
PWM
GATE
CONTROL
SYNCH
DRIVE
TTL D/A
CONVERTER
(DAC)
VCC
VAUX
PGOOD
UGATE
PHASE
LGATE
PGND
GND
VTTPG
FAULT/RT SS13
SS24
FIGURE 1.
FB _{COMP VID3 VID2 VID1 VID0 VID25}