ISL55110_15 Datasheet, PDF (2/18 Pages) Intersil Corporation – Dual, High Speed MOSFET Driver

ISL55110, ISL55111
Pin Configurations
ISL55110
(16 LD QFN)
TOP VIEW
ISL55111
(16 LD QFN)
TOP VIEW
VDD 1
ENABLE 2
PD 3
IN-B 4
16 15 14 13
EP
5678
12 OB
11 GND
10 VH
9 OA
VDD 1
ENABLE 2
PD 3
IN-B 4
16 15 14 13
EP
5678
12 OB
11 GND
10 VH
9 OA
ISL55110
(8 LD TSSOP)
TOP VIEW
VDD 1
PD 2
IN-B 3
IN-A 4
8 OB
7 GND
6 VH
5 OA
ISL55111
(8 LD TSSOP)
TOP VIEW
VDD 1
PD 2
IN-B 3
IN-A 4
8 OB
7 GND
6 VH
5 OA
Pin Descriptions
16 LD QFN 8 LD TSSOP
PIN
1
1
VDD
10
6
VH
11
7
GND
3
2
PD
2
-
ENABLE
5
4
4
3
9
5
12
8
6, 7, 8, 13, 14,
-
15, 16
EP
-
IN-A
IN-B, IN-B
OA
OB
NC
EP
FUNCTION
Logic power.
Driver high rail supply.
Ground, return for both VH rail and VDD logic supply. This is also the potential of the QFN’s exposed
pad (EP).
Power-down. Active logic high places part in power-down mode.
QFN packages only. When the ENABLE pin is low, the device will operate normally (outputs controlled
by the inputs). When the ENABLE pin is tied high, the output will be tri-stated. In other words, it will
act as if it is open or floating regardless of what is on the IN-x pins. This provides high-speed enable
control over the driver outputs.
Logic level input that drives OA to VH rail or ground. Not inverted.
Logic level input that drives OB to VH rail or ground. Not inverted on ISL55110, inverted on ISL55111.
Driver output related to IN-A.
Driver output related to IN-B.
No internal connection.
Exposed thermal pad. Connect to GND and follow good thermal pad layout guidelines.
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FN6228.8
January 29, 2015