ISL12026_10 Datasheet, PDF (2/24 Pages) Intersil Corporation – Real Time Clock/Calendar with I2C Bus™ and EEPROM

ISL12026, ISL12026A
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL12026IBZ
ISL12026IVZ
ISL12026AIBZ
PART
MARKING
12026 IBZ
2026 IVZ
12026A IBZ
V_BAT TRIP POINT BSW BIT DEFAULT TEMP RANGE PACKAGE
(V)
SETTING
(°C)
(Pb-Free)
V_DD < V_BAT
V_DD < V_BAT
2.2
BSW = 1
BSW = 1
BSW = 0
-40 to +85
-40 to +85
-40 to +85
8 Ld SOIC
8 Ld TSSOP
8 Ld SOIC
PKG.
DWG. #
M8.15
M8.173
M8.15
ISL12026AIVZ
2026A IVZ
2.2
BSW = 0
-40 to +85 8 Ld TSSOP M8.173
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL12026, ISL12026A. For more information on MSL please see
techbrief TB363.
Block Diagram
OSC
COMPENSATION
X1
32.768kHz
X2
IRQ/F_OUT
SELECT
OSCILLATOR
FREQUENCY 1Hz ^TIMER
DIVIDER
CALENDAR
LOGIC
TIME
KEEPING
REGISTERS
(SRAM)
SCL
SDA
SERIAL
INTERFACE
DECODER
CONTROL
DECODE
LOGIC
8
CONTROL/
REGISTERS
(EEPROM)
STATUS
REGISTERS
(SRAM)
ALARM
COMPARE
ALARM REGS
(EEPROM)
4k
EEPROM
ARRAY
BATTERY
SWITCH
CIRCUITRY
V_DD
V_BAT
Pin Descriptions
PIN NUMBER
SOIC
TSSOP
1
3
2
4
3
5
4
6
5
7
6
8
7
1
8
2
SYMBOL
DESCRIPTION
X1
The X1 pin is the input of an inverting amplifier and is intended to be connected to one pin of an external
32.768kHz quartz crystal. X1 can also be driven directly from a 32.768kHz source (see “Application Section”
on page 19.)
X2
The X2 pin is the output of an inverting amplifier and is intended to be connected to one pin of an external
32.768kHz quartz crystal (see “Application Section” on page 19.)
IRQ/F_OUT Interrupt Output/Frequency Output is a multi-functional pin that can be used as interrupt or frequency
output pin. The function is set via the control register. This output is an open drain configuration.
GND Ground.
SDA
Serial Data (SDA) is a bidirectional pin used to transfer serial data into and out of the device. It has an open
drain output and may be wire OR’ed with other open drain or open collector outputs.
SCL
The Serial Clock (SCL) input is used to clock all serial data into and out of the device. The input buffer on
this pin is always active (not gated).
V_BAT
V_DD
This input provides a backup supply voltage to the device. V_BAT supplies power to the device in the event
that the V_DD supply fails. This pin should be tied to ground if not used.
Power Supply.
2
FN8231.9
November 30, 2010