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HFA3102 Datasheet, PDF (2/6 Pages) Intersil Corporation – Dual Long-Tailed Pair Transistor Array
HFA3102
Absolute Maximum Ratings TA = 25oC
VCEO Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . 8.0V
VCBO Collector to Base Voltage . . . . . . . . . . . . . . . . . . . . . . . 12.0V
VEBO Emitterr to Base Voltage . . . . . . . . . . . . . . . . . . . . . . . . 12.0V
IC, Collector Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
125
Maximum Power Dissipation at 75oC
Any One Transistor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.25W
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . .175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications TA = 25oC
SYMBOLS
PARAMETER
TEST CONDITIONS
(NOTE 2)
TEST
LEVEL
ALL GRADES
MIN TYP MAX
UNITS
V(BR)CBO
Collector-to-Base Breakdown Voltage
(Q1, Q2, Q4, and Q5)
IC = 100µA, IE = 0
A
12
18
-
V
V(BR)CEO
Collector-to-Emitter Breakdown
Voltage (Q1 thru Q6)
IC = 100µA, IB = 0
A
8
12
-
V
V(BR)EBO
Emitter-to-Base Breakdown Voltage (Q3
and Q6)
IE = 50µA, IC = 0
A
5.5
6
-
V
ICBO
Collector Cutoff Current
(Q1, Q2, Q4, and Q5)
VCB = 5V, IE = 0
A
-
0.1
10
nA
IEBO
Emitter Cutoff Current (Q3 and Q6)
VEB = 1V, IC = 0
A
-
-
100
nA
hFE
DC Current Gain (Q1 thru Q6)
IC = 10mA, VCE = 3V
A
40
70
-
-
CCB
Collector-to-Base Capacitance
VCB = 5V, f = 1MHz
B
-
300
-
fF
CEB
Emitter-to-Base Capacitance
VEB = 0, f = 1MHz
B
-
200
-
fF
fT
Current Gain-Bandwidth Product
IC = 10mA, VCE = 5V
C
-
10
-
GHz
fMAX
Power Gain-Bandwidth Product
IC = 10mA, VCE = 5V
C
-
5
-
GHz
GNFMIN
Available Gain at Minimum Noise Figure
IC = 3mA, f = 0.5GHz
C
VCE = 3V
f = 1.0GHz
C
-
17.5
-
dB
-
12.4
-
dB
NFMIN
Minimum Noise Figure
IC = 3mA, f = 0.5GHz
C
VCE = 3V
f = 1.0GHz
C
-
1.8
-
dB
-
2.1
-
dB
NF50Ω
50Ω Noise Figure
IC = 3mA, f = 0.5GHz
C
VCE = 3V
f = 1.0GHz
C
-
3.3
-
dB
-
3.5
-
dB
hFE1/hFE2
VOS
IOS
DC Current Gain Matching
(Q1 and Q2, Q4 and Q5)
Input Offset Voltage (Q1 and Q2),
(Q4 and Q5)
Input Offset Current (Q1 and Q2),
(Q4 and Q5)
IC = 10mA, VCE = 3V
IC = 10mA, VCE = 3V
IC = 10mA, VCE = 3V
A
0.9
1.0
1.1
-
A
-
1.5
5
mV
A
-
5
25
µA
3-450