ISL6314CRZ-T Datasheet, PDF (18/32 Pages) Intersil Corporation – Single-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR11 and AMD Applications

ISL6314
Dynamic VID
Modern microprocessors need to make changes to their core
voltage as part of normal operation. They direct the ISL6314
to do this by making changes to the VID inputs. The ISL6314
is required to monitor the DAC inputs and respond to
on-the-fly VID changes in a controlled manner, supervising a
safe output voltage transition without discontinuity or
disruption. The DAC mode, ISL6314 is operating in,
determines how the controller responds to a dynamic VID
change.
INTEL DYNAMIC VID TRANSITIONS
When in Intel VR11 mode the ISL6314 checks the VID inputs
on the positive edge of an internal 5.5MHz clock. If a new
code is established and it remains stable for three consecutive
readings (0.36µs to 0.54µs), the ISL6314 recognizes the new
code and changes the internal DAC reference directly to the
new level. The Intel processor controls the VID transitions and
is responsible for incrementing or decrementing one VID step
at a time. In VR11 mode, the ISL6314 will immediately change
the internal DAC reference to the new requested value as
soon as the request is validated, which means the fastest
recommended rate at which a bit change can occur is once
every 1µs. If the VID code is changed by more then one step
at a time, the DAC will try to track it at a 5.5MHz step rate.
This will likely cause an overcurrent or overvoltage fault.
AMD DYNAMIC VID TRANSITIONS
When running in AMD 5-bit or 6-bit modes of operation, the
ISL6314 responds differently to a dynamic VID change. In the
AMD modes the ISL6314 still checks the VID inputs on the
positive edge of an internal 5.5MHz clock. In these modes the
VID code can be changed by more than a 1-bit step at a time. If
a new code is established and it remains stable for three
consecutive readings (0.36µs to 0.54µs), the ISL6314
recognizes the change and begins slewing the DAC in
6.25mV steps at a stepping frequency of 345kHz until the VID
and DAC are equal. Thus, the total time required for a VID
change, t_DVID, is dependent only on the size of the VID change
(ΔV_VID).
The time required for a ISL6314-based converter in AMD 5-bit
DAC configuration to make a 1.1V to 1.5V reference voltage
change is about 186µs, as calculated using Equation 10.
t_DVID
=
------------¹-------------
345 × 10³
⋅
⎛
⎝
0^---Δ-.^-0^-V---0^--V-6^--I-2^-D---5^{--⎠⎞}
(EQ. 10)
VID “OFF” DAC CODES
Both the Intel VR11 and the AMD 5-bit VID tables include “Off”
DAC codes, which indicate to the controller to disable all
regulation. Recognition of these codes is slightly different in that
they must be stable for four consecutive readings of a 5.5MHz
clock (0.54µs to 0.72µs) to be recognized. Once an “Off” code
is recognized the ISL6314 latches off, and must be reset by
dropping the EN pin.
Compensating Dynamic VID Transitions
During a VID transition, the resulting change in voltage on
the FB pin and the COMP pin causes an AC current to flow
through the error amplifier compensation components from
the FB to the COMP pin. This current then flows through the
feedback resistor, R_FB, and can cause the output voltage to
overshoot or undershoot at the end of the VID transition. In
order to ensure the smooth transition of the output voltage
during a VID change, a VID-on-the-fly compensation
network is required. This network is composed of a resistor
and capacitor in series, R_DVC and C_DVC, between the DVC
and the FB pin, as shown in Figure 8.
VDIFF
R_FB ^IDVC ^{= I}C
I_C
I_DVC
C_DVC
DVC
R_DVC
C_C
FB
R_C
COMP
x2
REF
C_REF
VDAC+RGND
-
+ _ERROR
AMPLIFIER
ISL6314 INTERNAL CIRCUIT
FIGURE 8. VID-ON-THE-FLY COMPENSATION NETWORK
This VID-on-the-fly compensation network works by
sourcing AC current into the FB node to offset the effects of
the AC current flowing from the FB to the COMP pin during a
VID transition. To create this compensation current the
ISL6314 sets the voltage on the DVC pin to be 2x the voltage
on the REF pin. Since the error amplifier forces the voltage
on the FB pin and the REF pin to be equal, the resulting
voltage across the series RC between DVC and FB is equal
to the REF pin voltage. The RC compensation components,
R_DVC and C_DVC, can then be selected to create the desired
amount of compensation current.
The amount of compensation current required is dependant
on the modulator gain of the system, K1, and the error
amplifier R-C components, R_C and C_C, that are in series
between the FB and COMP pins. Use Equations 11, 12, and
13 to calculate the RC component values, R_DVC and C_DVC,
for the VID-on-the-fly compensation network. For these
equations: V_IN is the input voltage for the power train; V_P-P
is the oscillator ramp amplitude (1.5V); and R_C and C_C are
the error amplifier R-C components between the FB and
COMP pins.
K1
=
-^V-----^I-^N----
V_PP
A
=
-----^K-----¹------
K1 – 1
(EQ. 11)
18
FN6455.2
October 8, 2009