ISL6227 Datasheet, PDF (17/27 Pages) Intersil Corporation – Dual Mobile-Friendly PWM Controller with DDR Option

ISL6227
output signal before the PWM comparator input. This
effectively creates an internal current control loop.
The resistor connected to the ISEN pin sets the gain in the
current sensing. The following expression estimates the
required value of the current sense resistor, depending on
the maximum continuous load current, and the value of the
MOSFETs r_DS(ON), assuming the ISEN pin sources 75µA
current.
R_CS
=
-^I-^M-----^A----^X-----^•----^r---^D----^S----⁽--^O----^N-----⁾
75 μ A
–
140 Ω
(EQ. 6)
Because the current sensing circuit is a sample-and-hold
type, the information obtained at the last moment of the
sampling is used. This current sensing circuit samples the
inductor current very close to its peak value. The current
feedback essentially injects a resistor R_i in series with the
original LC filter as shown in Figure 37, where the
sample-and-hold effect of the current loop has been ignored.
Vc and Vo are small signal components extracted from its
DC operation points.
Ri
Gm*Vc
+
-
Lo
DCR
+
Co
ESR
Ro Vo
-
FIGURE 37. THE EQUIVALENT CIRCUIT OF THE POWER
STAGE WITH CURRENT LOOP INCLUDED
The value of the injected resistor can be estimated by
Equation 7:
R_i
=
----^V----^I--^N------ ---^r---^D----^S----⁽--^O----^N-----⁾--- • 4.4kΩ
V_ramp R_CS + 140
(EQ. 7)
R_i is in kΩ, and r_DS and R_CS are in Ω . V_IN divided by V_ramp,
is defined as Gm, which is a constant 8dB or 18dB for both
channels in dual switcher applications, when V_IN is above
3V. Refer to Table 1 for the ramp amplitude in different V_IN
pin connections. The feed-forward effect of the V_IN is
reflected in Gm. V_C is defined as the error amplifier output
voltage.
TABLE 1. PWM COMPARATOR RAMP AMPLITUDE FOR
DUAL SWITCHER APPLICATION
VIN PIN CONNECTIONS
VRAMP
AMPLITUDE
Ch1 and Ch2 Input Voltage Input voltage >4.2V
VIN/8
Input voltage <4.2V
1.25V
GND
1.25V
TABLE 2. PWM COMPARATOR RAMP VOLTAGE AMPLITUDE
FOR DDR APPLICATION
VIN PIN CONNECTION
VRAMP
AMPLITUDE
Ch1 Input Voltage Input voltage >4.2V
Vin/8
Input voltage <4.2V
1.25V
GND
1.25V
Ch2 Input voltage >4.2V
0.625V
GND
1.25V
The small signal transfer function from the error amplifier
output voltage V_c to the output voltage V_o can be written in
Equation 8:
G(s)
=
G_m
-----------------^R----^o------------------
R_i + DCR + R_o
⎛
⎝
----^s----
Wz
+
1_⎠⎞
---------------------------------------------------------
⎛
⎝
------^s------
Wp1
+
1_⎠⎞
⎛
⎝
------^s------
Wp2
+
1_⎠⎞
(EQ. 8)
The DC gain is derived by shorting the inductor and opening
the capacitor. There is one zero and two poles in this transfer
function. The zero is related to ESR and the output
capacitor.
The first pole is a low frequency pole associated with the
output capacitor and its charging resistors. The inductor can
be regarded as short. The second pole is the high frequency
pole related to the inductor. At high frequency the output
capacitor can be regarded as a short circuit. By
approximation, the poles and zero are inversely proportional
to the time constants, associated with inductor and capacitor,
by Equations 9, 10 and 11:
Wz
=
-----------¹------------
ESR*C_o
(EQ. 9)
Wp1 = -₍--_E----_S-----_R------+-----₍--_R-----_i--+-----_D-¹----_C-----_R-----₎---_|-_|---_R-----_o---₎--_*---_C-----_o-
(EQ.10)
Wp2
=
-^R----ⁱ---+-----^D----^C-----^R------+-----^E----^S-----^R------^|-^|---^R----^o--
L_o
(EQ. 11)
Since the current loop separates the LC resonant poles into
two distant poles, and ESR zero tends to cancel the high
frequency pole, the second order system behaves like a first
order system. This control method simplifies the design of
the internal compensator and makes it possible to
accommodate many applications having a wide range of
parameters.
The schematics for the internal compensator is shown in
Figure 38.
17
FN9094.7
May 4, 2009