ISL78211 Datasheet, PDF (16/35 Pages) Intersil Corporation – Automotive Single-Phase Core Regulator for IMVP-6™ CPUs

ISL78211
Protection
The ISL78211 provides overcurrent (OC), overvoltage
(OV), undervoltage (UV) and over-temperature (OT)
protections as shown in Table 3.
Overcurrent is detected through the droop voltage, which
is designed as described in “Component Selection and
Application” on page 16. The OCSET resistor sets the
overcurrent protection level. An overcurrent fault will be
declared when the droop voltage exceeds the
overcurrent set point for more than 120µs. A
way-overcurrent fault will be declared in less than 2µs
when the droop voltage exceeds twice the overcurrent
set point. In both cases, the UGATE and LGATE outputs
will be tri-stated and PGOOD will go low.
The overcurrent condition is detected through the droop
voltage. The droop voltage is equal to I_core × R_droop,
where R_droop is the load line slope. A 10µA current source
flows out of the OCSET pin and creates a voltage drop
across R_OCSET (shown as R₁₀ in Figure 2). Overcurrent is
detected when the droop voltage exceeds the voltage
across R_OCSET. Equation 1 gives the selection of R_OCSET.
R_OCSET
=
I _OC × R_droop
10μA
(EQ. 1)
For example: The desired overcurrent trip level, I_oc, is
30A, R_droop is 2.1mΩ, Equation 1 gives R_OCSET = 6.3k.
Undervoltage protection is independent of the
overcurrent limit. A UV fault is declared when the output
voltage is lower than (VID-300mV) for more than 1ms.
The gate driver outputs will be tri-stated and PGOOD
will go low. Note that a practical core regulator design
usually trips OC before it trips UV.
There are two levels of overvoltage protection and
response. An OV fault is declared when the output
voltage exceeds the VID by +200mV for more than 1ms.
The gate driver outputs will be tri-stated and PGOOD will
go low. The inductor current will decay through the
low-side FET body diode. Toggling of VR_ON or bringing
V_DD below 4V will reset the fault latch. A
way-overvoltage (WOV) fault is declared immediately
when the output voltage exceeds 1.7V. The ISL78211 will
latch PGOOD low and turn on the low-side FETs. The
low-side FETs will remain on until the output voltage
drops below approximately 0.85V, then all the FETs are
turned off. If the output voltage again rises above 1.7V,
the protection process repeats. This mechanism provides
maximum protection against a shorted high-side FET
while preventing the output from ringing below ground.
Toggling VR_ON cannot reset the WOV protection;
recycling VDD will reset it. The WOV detector is active all
the time, even when other faults are declared, so the
processor is still protected against the high-side FET
leakage while the FETs are commanded off.
The ISL78211 has a thermal throttling feature. If the
voltage on the NTC pin goes below the 1.2V
over-temperature threshold, the VR_TT# pin is pulled
low indicating the need for thermal throttling to the
system oversight processor. No other action is taken
within the ISL78211.
Component Selection and
Application
Soft-Start and Mode Change Slew Rates
The ISL78211 commands two different output voltage
slew rates for various modes of operation. The slow slew
rate reduces the in-rush current during start-up and the
audible noise during the entry and the exit of Deeper
Sleep Mode. The fast slew rate enhances the system
performance by achieving active mode regulation quickly
during the exit of Deeper Sleep Mode. The SOFT current
is bidirectional-charging the SOFT capacitor when the
output voltage is commanded to rise, and discharging
the SOFT capacitor when the output voltage is
commanded to fall.
Figure 5 shows the circuitry on the SOFT pin. The SOFT
pin, the non-inverting input of the error amplifier, is
connected to ground through capacitor C_SOFT. I_SS is an
internal current source connected to the SOFT pin to
charge or discharge C_SOFT. The ISL78211 controls the
output voltage slew rate by connecting or disconnecting
another internal current source I_Z to the SOFT pin,
depending on the state of the system, i.e. Start-up or
Active mode, and the logic state on the DPRSLPVR pin.
The “Soft-start Current” on page 6 of the Electrical
Specification Table shows the specs of these two current
sources.
I
I
SS
Z
INTERNAL TO
ISL6261A
ERROR
AMPLIFLIER
C
SOFT
V
REF
FIGURE 5. SOFT PIN CURRENT SOURCES FOR FAST
AND SLOW SLEW RATES
I_SS is 41µA typical and is used during start-up and mode
changes. When connected to the SOFT pin, I_Z adds to I_SS
to get a larger current, labeled “IGV” on page 6 in the
“Electrical Specification Table”, on the SOFT pin. I_GV is
typically 200µA with a minimum of 175µA.
16
FN7578.0
March 8, 2010