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ISL6315_07 Datasheet, PDF (15/20 Pages) Intersil Corporation – Two-Phase Multiphase Buck PWM Controller with Integrated MOSFET Drivers
ISL6315
number of approximations and is generally not accurate at
frequencies approaching or exceeding half the switching
frequency. When designing compensation networks, select
target crossover frequencies in the range of 10% to 30% of
the per-channel switching frequency, FSW.
General Application Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multiphase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
addition to this guide, Intersil provides complete reference
designs that include schematics, bills of materials, and
example board layouts for all common microprocessor
applications.
MOSFETs
Given the fixed switching frequency of the ISL6315 and the
integrated output drives, the selection of MOSFETs revolves
closely around the current each MOSFET is required to
conduct, the capability of the devices to dissipate heat, as well
as the characteristics of available heat sinking. Since the
ISL6315 drives the MOSFETs with 5V, the selection of
appropriate MOSFETs should be done by comparing and
evaluating their characteristics at this specific VGS bias voltage.
LOWER MOSFET POWER CALCULATION
Since virtually all of the heat loss in the lower MOSFET is
conduction loss (due to current conducted through the
channel resistance, rDS(ON)), a quick approximation for heat
dissipated in the lower MOSFET can be found in the
following equation:
PLMOS1
=
rDS(ON)
⎛
⎜
-I-O-----U----T--⎟⎞
⎝ 2⎠
2
(1
–
D)
+
-I-L----,-P-----2--P----(--1-----–-----D-----)
12
(EQ. 15)
where: IM is the maximum continuous output current, IL,P-P
is the peak-to-peak inductor current, and D is the duty cycle
(approximately VOUT/VIN).
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at IM, VD(ON); the switching
frequency, fS; and the length of dead times, td1 and td2, at
the beginning and the end of the lower-MOSFET conduction
interval, respectively.
PLMOS 2
=
VD(ON) fS
⎛
⎜
-I-O-----U----T--
⎝2
+
I--P-------P-- ⎟⎞
2⎠
td1
+
⎛
⎜
-I-O-----U----T--
⎝2
–
I--P-------P--⎟⎞
2⎠
td2
(EQ. 16)
The above equation assumes the current through the lower
MOSFET is always positive; if so, the total power dissipated
in each lower MOSFET is approximated by the summation of
PLMOS1 and PLMOS2.
UPPER MOSFET POWER CALCULATION
In addition to rDS(ON) losses, a large portion of the upper-
MOSFET losses are switching losses, due to currents
conducted through the device while the input voltage is
present as VDS. Upper MOSFET losses can be divided into
separate components, separating the upper-MOSFET
switching losses, the lower-MOSFET body diode reverse
recovery charge loss, and the upper MOSFET rDS(ON)
conduction loss.
In most typical circuits, when the upper MOSFET turns off, it
continues to conduct the inductor current until the voltage at
the phase node falls below ground. Once the lower MOSFET
begins conducting (via its body diode or enhancement
channel), the current in the upper MOSFET falls to zero. In the
following equation, the required time for this commutation is t1
and the associated power loss is PUMOS,1.
P U M O S ,1
≈
VIN
⎛
⎜
-I-O-----U----T--
⎝N
+
I--L----,-P-------P--⎟⎞
2⎠
⎛
⎜
⎝
-t-1--
⎞
⎟
2⎠
fS
(EQ. 17)
Similarly, the upper MOSFET begins conducting as soon as
it begins turning on. Assuming the inductor current is in the
positive domain, the upper MOSFET sees approximately the
input voltage applied across its drain and source terminals,
while it turns on and starts conducting the inductor current.
This transition occurs over a time t2, and the approximate
the power loss is PUMOS,2.
PUMOS,
2
≈
VIN
⎛
⎜
⎝
-I-O-----U----T--
N
–
I--L----,-P-------P--⎟⎞
2⎠
⎛
⎜
⎝
-t-2--
⎞
⎟
2⎠
fS
(EQ. 18)
A third component involves the lower MOSFET’s reverse-
recovery charge, QRR. Since the lower MOSFET’s body
diode conducts the full inductor current before it has fully
switched to the upper MOSFET, the upper MOSFET has to
provide the charge required to turn off the lower MOSFET’s
body diode. This charge is conducted through the upper
MOSFET across VIN, the power dissipated as a result,
PUMOS,3 can be approximated as:
PUMOS,3 = VIN Qrr fS
(EQ. 19)
Lastly, the conduction loss part of the upper MOSFET’s
power dissipation, PUMOS,4, can be calculated using the
following equation:
PU M O S ,4
=
rDS(ON)
⎛
⎜
⎝
-I-O-----U----T--⎟⎞
N⎠
2
d
+
-I-P-------2P--
12
(EQ. 20)
In this case, of course, rDS(ON) is the ON resistance of the
upper MOSFET.
The total power dissipated by the upper MOSFET at full load
can be approximated as the summation of these results.
Since the power equations depend on MOSFET parameters,
choosing the correct MOSFETs can be an iterative process
that involves repetitively solving the loss equations for
15
FN9222.1
July 18, 2007