ISL23428 Datasheet, PDF (15/21 Pages) Intersil Corporation – Dual, 128-Tap, Low Voltage Digitally Controlled Potentiometer (XDCP™)

ISL23428
When the device enters shutdown, all current DCP WR settings are
maintained. When the device exits shutdown, the wipers will
return to the previous WR settings after a short settling time
(see Figure 26).
POWER-UP
MID SCALE = 40H
USER PROGRAMMED
AFTER SHDN
SHDN ACTIVATED
SHDN RELEASED
WIPER RESTORE TO
THE ORIGINAL POSITION
SHDN MODE
0
TIME (s)
FIGURE 26. SHUTDOWN MODE WIPER RESPONSE
SPI Serial Interface
The ISL23428 supports an SPI serial protocol, mode 0. The
device is accessed via the SDI input and SDO output with data
clocked in on the rising edge of SCK, and clocked out on the
falling edge of SCK. CS must be LOW during communication with
the ISL23428. The SCK and CS lines are controlled by the host or
master. The ISL23428 operates only as a slave device.
All communication over the SPI interface is conducted by
sending the MSB of each byte of data first.
Protocol Conventions
The SPI protocol contains Instruction Byte followed by one or more
Data Bytes. A valid Instruction Byte contains instruction as the three
MSBs, with the following five register address bits (see Table 3).
The next byte sent to the ISL23428 is the Data Byte.
TABLE 3. INSTRUCTION BYTE FORMAT
BIT # 7
6
5
4
3
2
1
0
I2
I1
I0 R4 R3 R2 R1 R0
Table 4 contains a valid instruction set for ISL23428.
If the [R4:R0] bits are zero or one, then the read or write is to the
WRi register. If the [R4:R0] are 10000, then the operation is to
the ACR.
I2
I1
I0
0
0
0
0
0
1
0
1
1
1
0
0
1
1
0
Where X means “do not care”.
INSTRUCTION SET
R4
R3
X
X
X
X
X
X
R4
R3
R4
R3
TABLE 4. INSTRUCTION SET
R2
R1
R0
X
X
X
X
X
X
X
X
X
R2
R1
R0
R2
R1
R0
NOP
ACR READ
ACR WRTE
WRi or ACR READ
WRi or ACR WRTE
OPERATION
15
FN7904.0
August 25, 2011