ISL1904 Datasheet, PDF (15/21 Pages) Intersil Corporation – Dimmable AC Mains LED Driver with PFC and Primary Side Regulation

ISL1904
TABLE 1. OSCILLATOR DEFINITIONS
V_mINrms = Minimum RMS input voltage
V_maxINrms = Maximum RMS input voltage
η=
Efficiency
f_min(avg) =
D_max =
Dmin =
Typical frequency when V_IN (instantaneous) = minimum
V_IN(rms)
Maximum typical duty cycle desired
Minimum typical duty cycle
t_ON(MAX) =
t_ON
t_OFF
Ls =
f_typ(avg) x D_max
ON-time of the power FET controlled by OUT
OFF-time duration required for CrCM operation
Secondary inductance
Lp =
Primary inductance
Nsp =
Transformer turns ratio, Ns/Np
Ip(peak) = Peak primary current within a switching cycle
t_delay =
User adjustable delay before the next switching cycle
begins
The first calculation required is to determine the required
secondary inductance shown by Equation 2.
L_s
=
V_-----o----⋅_---(_---1_{----–-----}D_{-----m----a----x---})_--²_-
f_typ(avg) ⋅ 2 ⋅ I_o
H
(EQ. 2)
The turns ratio N_sp is calculated next in Equation 3.
N_sp
=
------^V----^o-----^â‹---⁽--¹-----–-----^D----^m-----^a---^x---⁾------
η ⋅ V_mINrms ⋅ D_max
(EQ. 3)
Knowing the secondary inductance and the turns ratio, the
primary inductance can be calculated by using Equation 4.
L_p
=
----^L----^s-----
N_s
2
p
H
(EQ. 4)
With this information, the lowest switching frequency, which
occurs at maximum load and at the peak instantaneous input
voltage at the minimum RMS voltage, can be determined. By
selecting the maximum duty cycle and a typical average
frequency, the ON-time is already determined by Equation 5.
t_ON
=
-----^D-----^m-----^a---^x------
f_min(avg)
s
(EQ. 5)
The primary peak current at the end of the ON-time is shown in
Equation 6:
I_p(peak)
=
V_{-----r--m-----s----}⋅_-------2_-----⋅_---t_--O----N--
L_p
A
(EQ. 6)
The peak secondary current is the peak primary current divided
by the transformer turns ratio shown in Equation 7.
I_s(peak)
=
I_{--p----(--p---e---a----k---)}
N_sp
A
(EQ. 7)
And the OFF-time is shown in Equation 8:
t_OFF
=
L_----s----⋅_---I_{--s---(--p----e---a---k---)}
V_o
s
(EQ. 8)
The lowest switching frequency is the reciprocal of the sum of the
ON-time, the OFF-time, and the delay time is shown in
Equation 9.
f_min
=
-------------------------¹--------------------------
t_ON + t_OFF + t_delay
Hz
(EQ. 9)
The delay time can be approximated if the equivalent
drain-source capacitance (C_oss) of the primary switch is known.
This value should also include any parasitic capacitance on the
drain node. These parameters may not be known during the early
stages of the design, but are typically on the order of 300ns to
500ns.
t_d
ela
y
≈
-^π----^â‹--------^L---^p-----^â‹---⁽--^C-----^o---^s---^s----+-----^C----^o----^t--^h---^e---^r---⁾
2
s
(EQ. 10)
If the lowest frequency does not meet the requirements, then
iterative calculations may be required.
The highest frequency is determined by the shortest ON-time
summed with t_delay. The shortest ON-time occurs at high line and
minimum load, and occurs at or near the AC zero crossing when
the primary (and secondary) current is zero. The minimum
non-zero ON-time the ISL1904 can produce is ~100ns,
suggesting an operating frequency above 1MHz. In any event the
maximum frequency clamp would limit the frequency to about
1MHz. Once the primary and secondary inductances are known,
the general formulae to calculate the ON-time and OFF-time at
an equivalent DC input voltage are shown by Equations 11 and
12:
t_OFF
=
2_-----⋅_---L_----s----⋅_---I_--o-
V_o
⋅
⎛
⎜
⎝
1
+
-^L-_L--^p-_s----^â‹-_â‹--^N-_V---^s-_I--_Np----_r-^â‹-_m--^V---_s-^o-_{⎠⎟⎞}
s
(EQ. 11)
t_ON
=
2_-----⋅_---L_----p----⋅_---N_{-----s---p----}⋅_---I_--o--
V_INrms
⋅
⎛
⎜1
⎝
+
L_--L--p-s---⋅_-⋅--N_{-V----s-I--Np----r}⋅_--m--V_{---s-o-⎠⎟⎞}
s
(EQ. 12)
It is clear from the equations there is a linear relationship
between load current and frequency. At some light load the
frequency will be limited by the maximum frequency clamp.
There is an inverse relationship between the input voltage and
frequency and its effect is restricted by the typical input voltage
range.
It should be noted, however, that the above equations assume
full conduction angle of the AC mains. When conduction angle
modulating dimmers are used to block a portion of each AC
half-cycle, the switching currents remain essentially unchanged
during the conduction portion of the AC half-cycle as the
conduction angle is reduced. The conduction angle is reduced,
not the amplitude of the waveform envelope. The result being the
steady state frequency behavior will not vary much as the
conduction angle is reduced.
15
FN8286.1
September 20, 2012