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ISL78225 Datasheet, PDF (14/21 Pages) Intersil Corporation – 4-Phase Interleaved Boost PWM Controller with Light Load Efficiency Enhancement
ISL78225
Soft-Start Process for Different
Modes (Refer to Table 1)
Case A (VMODE = VCC, VPWM_TRI = VCC)
Figure 15 shows the pre-bias start-up PWM waveform for Case A
in Table 1. The VPWM_TRI = VCC so the PWM can output a tri-level
signal, which the external drivers need to identify, and
VMODE = VCC to ban the automatic phase dropping function.
Time t4, t5: Same as the t4, t5 in Figure 14, soft-start has not
started yet. See “Operation Initialization Before Soft-Start” on
page 13 for a detailed description.
Time t6: At the beginning of t6, the SS pin has already been
pre-biased to a value very close to the VFB, so that the internal
reference signal will start from the voltage close to the FB pin.
This scheme will eliminate the internal delay for a non pre-biased
application.
The DRIVE_EN pin, which is connected to the enable pins of the
external drivers, will be pulled high when first PWM toggles at the
beginning of t6; as a result external drivers will start working. The
PWM signals will switch between tri-level and low. The driver will
only turn on the lower MOSFET accordingly, and the duty cycle
will increase gradually from 0 to steady state. The synchronous
MOSFET (Upper FET for Boost converter) will never turn on during
this time, so diode emulation can be achieved during the start-up
and in turn prevent negative current flowing from output to input.
Time t7: Soft-start finishes at the beginning of t7. The PWMs will
change to a 2-level 0V to 5V switching signal and the
synchronous MOSFET will be turned on.
SOFT-START WAVEFORM (CASE A)
V
Vfb
Vref
0 t4 t5
V
NOTE: t4, t5 PERIOD ARE FROM FIGURE 5
t6
t7
DIODE EMULATION
SYNCHRONOUS
OPERATION
5V
LOWER FET TURN ON
2.5V
(PWM_INV = 0)
PWM
0
DIODE EMULATION
SYNCHRONOUS
OPERATION
5V
(PWM_INV = 1)
2.5V
PWM
0
5V
DRIVE_EN
0
FIGURE 15. SOFT-START WAVEFORM (CASE A)
Case B (VMODE < 4V, VPWM_TRI = VCC, Light
Load Condition)
The only difference between Case A and Case B start-up
waveforms is that at light load, Case B can drop phases and have
cycle-by-cycle diode emulation at PWM1 and PWM2.
For Case B applications, where good light load efficiency is
always preferred, the ISL78225 provides three light load
efficiency enhancement methods. When the load current
reduces, the ISL78225 will first assert the automatic phase
dropping function to reduce the active phase number according
to the load level. The minimum active phase number is two. If the
load current further reduces even when running at two-phase
operation, the ISL78225 will assert a second method by utilizing
cycle-by-cycle diode emulation. During this time the IC will sense
the inductor current, and when the current is approximately zero,
it will turn off the synchronous MOSFET. If the load current is
further reduced to deep light load operation, pulse skipping
function will kick in to optimize the overall efficiency.
14
FN7909.0
December 15, 2011