ISL6232 Datasheet, PDF (14/25 Pages) Intersil Corporation – High Efficiency System Power Supply Controller for Notebook Computers

BOOT5
UGATE5
PHASE5
LGATE5
COMP5
ISL6232
VCC
LDO5
5V SYNCH
PWM BUCK
CONTROLLER
3.3V SYNCH
PWM BUCK
CONTROLLER
BOOT3
UGATE3
PHASE3
LGATE3
COMP3
CS5
FB5
OUT5
DECODER
6pF
CLK5
ENA5
PGOOD5
4.5V
CLK3
ENA3
PGOOD3
DECODER
6pF
CS3
FB3
OUT3
3.0V
+
LDO5
VIN
5V LDO
SHDN#
EN3
EN5
SHUTDOWN
STANDBY
POWER-UP
SQUENCE
OSC
REF
3.3V LDO
LDO3
PGOOD
REF
FIGURE 30. FUNCTIONAL DIAGRAM
Each buck controller includes a feedback resistor divider
network, a multiplexer for programmable mode, a trans-
conductance error amplifier, a PWM comparator, high-side
gate and low-side gate drivers, and control logic circuit.
Figure 31 shows the synchronous buck PWM controller
block diagram.
The external loop compensator is used to optimize the
transient response with optimized external components. An
accurate current sensing resistor in series with output
inductor or the DC resistance of the inductor is used to
sense the output current for current ramp signal and
overcurrent protection. Moreover, it contains fault-protection
circuitry that can monitor the undervoltage and overvoltage
conditions of the OUT3 and OUT5 buck controller output
voltages. A power-on sequence is implemented to control
the power-up timing of OUT3 and OUT5. The power good
signal, PGOOD, is toggled to logic high once both OUT3 and
OUT5 reach 90% of the regulation points and soft start
period is finished.
The ISL6232 also includes 5V and 3.3V linear regulators, 2V
reference, and automatic switch-over circuits. All the blocks
inside ISL6232 are not directly powered by V_IN voltage.
Instead, the VIN voltage is stepped down to 5V by the 5V
LDO5 regulator to supply both internal circuitry and the gate
14
FN9116.1
April 20, 2009