ISL6219A_07 Datasheet, PDF (14/17 Pages) Intersil Corporation – Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications

ISL6219A
C₂ (OPTIONAL)
R_C ^CC
COMP
R_FB
+
V_DROOP
-
FB
VSEN
FIGURE 11. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6219A CIRCUIT
The feedback resistor, R_FB, has already been chosen as out-
lined in Load-Line Regulation Resistor. Select a target band-
width for the compensated system, f₀. The target bandwidth
must be large enough to assure adequate transient perfor-
mance, but smaller than 1/3 of the per-channel switching fre-
quency. The values of the compensation components
depend on the relationships of f₀ to the L-C pole frequency
and the ESR zero frequency. For each of the three cases
defined in the following, there is a separate set of equations
for the compensation components
.
Case 1:
Case 2:
---------¹----------
2π LC
>
f₀
R_C
=
R
FB
2_----π_----f_--0---V_{-----p---p-------}L_----C_---
0.75 V _{I N}
C_C
=
--------⁰---^.--⁷---⁵----^V----^I--^N----------
2πV_PPR_FBf₀
---------¹----------
2π LC
≤
f₀
<
--------------¹---------------
2πC(ESR)
R_C
=
R_F
B
V_{-----P----P----}(_--2_----π_----)_--²_----f_--0--²_----L_----C_---
0.75 V_IN
C_C
=
--------------------⁰----^.-⁷----⁵---^V-----^I--^N---------------------
(2π)² f₀₂ V_PPR_FB LC
(EQ. 17)
Case 3:
f₀ > ₂----_π----_C-----₍-¹-_E-----_S----_R-----₎
R_C
=
R_FB
--------²----^π----^f--⁰---^V-----^p---^p---^L---------
0.75 V_IN (ESR)
C_C
=
-⁰---^.--⁷---⁵----^V----^I--^N----⁽--^E-----^S----^R-----⁾-------^C---
2πV_PPR_FBf₀ L
In Equations 17, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all out-
put capacitors; ESR is the equivalent-series resistance of the
bulk output-filter capacitance; and V_PP is the peak-to-peak
sawtooth signal amplitude as described in Figure 5 and
Electrical Specifications on page 5.
Once selected, the compensation values in Equations 17
assure a stable converter with reasonable transient perfor-
mance. In most cases, transient performance can be
improved by making adjustments to R_C. Slowly increase the
value of R_C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
C_C will not need adjustment. Keep the value of C_C from
Equations 17 unless some performance issue is noted.
The optional capacitor C₂, is sometimes needed to bypass
noise away from the PWM comparator (see Figure 5). Keep
a position available for C₂, and be prepared to install a high-
frequency capacitor of between 22pF and 150pF in case any
jitter problem is noted.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A type
III controller, as shown in Figure 12, provides the necessary
compensation.
The first step is to choose the desired bandwidth, f₀, of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
an extra high-frequency pole, f_HF. This pole can be used for
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
good general rule is to chose f_HF = 10 f₀, but it can be higher
if desired. Choosing f_HF to be lower than 10 f₀ can cause
problems with too much phase shift below the system band-
width.
In the solutions to the compensation equations, there is a sin-
gle degree of freedom. For the solutions presented in Equa-
tions 18, R_FB is selected arbitrarily. The remaining
compensation components are then selected according to
Equation 18.
C₂
R_C ^CC
COMP
C₁
+
R₁
R_FB
V_DROOP
-
FB
VSEN
FIGURE 12. COMPENSATION CIRCUIT FOR ISL6219A BASED
CONVERTER WITHOUT LOAD-LINE
REGULATION.
14
FN9093.1
March 20, 2007