ISL29044IROMZ-T7 Datasheet, PDF (14/19 Pages) Intersil Corporation – Low Power Ambient Light and Proximity Sensor with Internal IR-LED and Digital Output

ISL29044
ALS_FLAG BIT [B3]
The ALS_FLAG[B3] bit is a status bit for light intensity detection.
The bit is set to logic HIGH when the light intensity results at (reg
0x09, 0x0A), crosses the interrupt threshold’s window (register
address 0x05 - 0x07), and is set to logic LOW when its within the
interrupt threshold’s window. Once the interrupt is triggered, the
ALS_FLAG bit goes HIGH. The ALS/IR_FLAG bit is cleared by
writing ‘0’ to [B3]. Table 13 shows interrupt flag states.
BIT 3
0
1
TABLE 13. INTERRUPT FLAG BIT
OPERATION
Interrupt is cleared or not triggered yet
Interrupt is triggered
PROXIMITY INTERRUPT PERSIST BITS [B6,B5]
The interrupt persist bits provide control over when interrupts
occur. There are four different selections for this feature. A value
of N (where N is 1, 4, 8, and 16) results in an interrupt only if the
value remains above the PROX_HT (reg0x04) threshold for N
consecutive integration. At that moment, the PROX_FLAG is high
and remains asserted until cleared by writing the '0' to
PROX_FLAG bit or if the value is below PROX_LT (reg0x03)
threshold for N consecutive integration, it will also clear the
PROX_FLAG.
For example, if N is equal to 8, then an interrupt is generated
whenever the last conversion results in a value above the
PROX_HT threshold, then PROX_FLAG = 1. There are two ways of
clearing the PROX_FLAG. You can write a 0h to Reg0x02 to
manually clear the flag, or if the conversion results are less than
the PROX_LT value, upon completion of the measurement, the
Reg0x02 will be set to 0h and thus, the PROX_FLAG will be
automatically cleared.
TABLE 14. PROXIMITY LOGIC PERSIST BITS
B2
B1
NUMBER OF INTEGRATION CYCLES (n)
0
0
1
0
1
4
1
0
8
1
1
16
PROX_FLAG BIT [B7]
PROX_FLAG bit [B7] is a status bit for IR light intensity detection.
[B7] is set to logic HIGH when the IR light intensity reflected from
the object to the sensor(reg 0x08) crosses the PROX_HT(register
address 0x04), and if [B7] is set to logic LOW when the IR light
intensity goes lower than PROX_LT (register address 0x03) or to
clear by writing ‘0’ to PROX_FLAG. Table 15 shows the interrupt
flag states.
BIT 3
0
1
TABLE 15. INTERRUPT FLAG BIT
OPERATION
Logic Low (Far)
Logic High (Near)
PROX_TL Registers (Address: 0x03)
TABLE 16. PROX_TL REGISTER BITS
Reg.
Register Bits
Addr
DFLT
NAME Access (Hex) B7 B6 B5 B4 B3 B2 B1 B0 (Hex)
PROX_TL RW 0x03 TL7 TL6 TL5 TL4 TL3 TL2 TL1 TL0 0x00
The lower interrupt threshold registers are used to set the lower
trigger point for interrupt generation. If the Prox value crosses
below or is equal to the lower threshold, it will be clear the last
state of Interrupt. For example, if PROX_FLAG is high at the last
state, then the proximity value is below the PROX_LT threshold
and the PROX_FLAG will go low at this moment. The register
defaults to 0x00 on power-up.
PROX_TH Registers (Address: 0x04)
TABLE 17. PROX_TH REGISTER BITS
Reg.
Register Bits
Addr
DFLT
NAME Access (Hex) B7 B6 B5 B4 B3 B2 B1 B0 (Hex)
PROX_TH RW 0x04 TH7 TH6 TH5 TH4 TH3 TH2 TH1 TH0 0xFF
The upper proximity threshold registers are used to set the upper
trigger point for Logic HIGH (Near). If the Prox value crosses
above or is equal to the upper threshold, a Logic HIGH (Far) is
asserted on the interrupt flag. Registers PROX_HT(0x04) are set
to upper threshold. 0x04 register is defaulted to 0xFF on
power-up.
ALS_TH1 and ALS_TH2 Registers (Address:
0x05 & 0x06[B3,B2,B1,B0])
TABLE 18. INTERRUPT THRESHOLD LOW REGISTER BITS
NAME
Reg.
Register Bits
Addr
DFLT
Access (Hex) B7 B6 B5 B4 B3 B2 B1 B0 (Hex)
ALS_TH2_MSB RW 0x06
TL3 TL2 TL1 TL0 0x00
ALS_TH1_LSB RW 0x05 TL7 TL6 TL5 TL4 TL3 TL2 TL1 TL0 0x00
The lower interrupt threshold registers are used to set the lower
trigger point for interrupt generation. If the ALS value crosses
below or is equal to the lower threshold, an interrupt is asserted
on the interrupt flag. An 8-bit RW Register ALS_TH1(0x05) and a
nibble ALS_TH2(0x06[B3,B2,B1,B0]) provides the low and high
bytes, respectively, of the lower interrupt threshold. The high and
low bytes from each set of registers are combined to form a
12-bit threshold value. The interrupt threshold registers default
to 0x00 on power-up.
14
FN8305.0
October 30, 2012