ISL29044IROMZ-T7 Datasheet, PDF (13/19 Pages) Intersil Corporation – Low Power Ambient Light and Proximity Sensor with Internal IR-LED and Digital Output

ISL29044
BIT 0
0
1
TABLE 6. RANGE REGISTER BITS
OPERATION
Disable ALS sensing and IR sensing
Enable ALS sensing and IR sensing
PROX_DR[B3]
PROX_DR bit[B3] selects the IR driver current strength. The IR
driver sinks current through the LDR pin. The drive capability can
be programmed through [B3] either a pulse 110mA current sink
or 220mA pulse current sink. The higher the amplitude, the
better the range of detection.
TABLE 7. CURRENT DRIVER REGISTER BITS
BIT 0
OPERATION
0
110mA current sink
1
220mA current sink
PROX SLEEP MODE [B6,B5,B4]
ISL29044 is equipped with multiple sleep modes in proximity
sensing. It is a good power saving feature. The different sleep
modes can be selected by setting [B6-B4] bits on register 0x01.
When proximity sensing is enabled, the ADC converts for 0.54ms
and sleeps for 800ms by default.
Table 8 lists the possible operating sleep modes.
TABLE 8. SLEEP MODES BITS
SLEEP TIME OPERATION
B6
B5
B4
(msec)
0
0
0
800 (Default)
0
0
1
400
0
1
0
200
0
1
1
100
1
0
0
75
1
0
1
50
1
1
0
12.5
1
1
1
0.0 (Sleep Mode Disabled)
PROX_EN[B7].
Proximity is enabled when PROX_EN[B7] is set to high.
BIT 0
0
1
TABLE 9. EN_PROXIMITY REGISTER BITS
CURRENT DRIVER OPERATION
Disable proximity sensing (Default)
Enable proximity sensing
Interrupt Register (Address: 0x02)
TABLE 10. INTERRUP REGISTER ADDRESS
Reg.
Register Bits
NAME Access Addr
(Hex) ^B7
B6
B5
B4
B3
B2
B1
DFLT
(Hex)
B0
INTERRUPT
RW
0x02
PROX_
FLAG
PROX_
PRST1
PROX_
PRST0
0
ALS/IR
_FLAG
ALS/IR
_PRST1
ALS/IR_
PRSST0
INT_CTRL
0x00
The Interrupt register consists of all status bits. The ISL29044
has an interrupt scheme designed for both ALS/IR sensing and
Proximity logic detection sensing. The register has one proximity
sensing flag bit, two proximity sensing persistent bits, one
ALS/IR sensing flag bit and two ALS/IR persistent bits. The
default register value is 0x00.
INT_CTRL[B0]
INT_CTRL [B0] can be programmed to cause an interrupt when
either ALS_FLAG or PROX_FLAG go high or when both go high.
Writing ‘0’ will do a logical OR and a one will do a logical AND.
The INT pin is open-drain therefore, in this INT_CTRL bit, there are
two options to make the INT pin go low. Once the interrupt is
triggered, the INT pin goes low if the PROX_FLAG bit or ALS_FLAG
goes high in logic OR option. Otherwise, the interrupt is triggered
and the INT pin goes low if the PROX_FLAG bit and ALS_FLAG go
high in logic AND option. Both the INT pin and these interrupt
status bits are automatically cleared when writing ‘0’ to those
flag bits. Table 11 shows interrupt control bits.
TABLE 11. INTERRUPT CONTROL REGISTER BITS
BIT 0
OPERATION
0
Logical OR
1
Logical AND
ALS/IR INTERRUPT PERSIST BITS [B2,B1]
The interrupt persist bits[B2LOL, B1] provide control when
interrupts occur. There are four different selections for this
feature. A value of N (where N is 1, 4, 8, and 16) results in an
interrupt only if the value remains outside the threshold window
for N consecutive integration cycles. For example, if N is equal to
8 and the integration time is 100ms. An interrupt is generated
whenever the last conversion results in a value outside of the
programmed threshold window. Table 12 lists the possible
interrupt persist bits.
TABLE 12. INTERRUPT PERSIST BITS
B2
B1
NUMBER OF INTEGRATION CYCLES (n)
0
0
1
0
1
4
1
0
8
1
1
16
13
FN8305.0
October 30, 2012