ISL6527 Datasheet, PDF (13/16 Pages) Intersil Corporation – Single Synchronous Buck Pulse-Width Modulation PWM Controller

ISL6527, ISL6527A
ISL6527,
ISL6527A
-
+
CPVOUT
DBOOT ₊
VIN
V_D
-
BOOT
CBOOT
UGATE
PHASE
Q_UPPER
NOTE:
V_G-S ≈ V_CC -V_D
LGATE
Q_LOWER
GND
NOTE:
V_G-S ≈ V_CC
FIGURE 7. UPPER GATE DRIVE BOOTSTRAP
Just after the PWM switching cycle begins and the charge
transfer from the bootstrap capacitor to the gate capacitance
is complete, the voltage on the bootstrap capacitor is at its
lowest point during the switching cycle. The charge lost on
the bootstrap capacitor will be equal to the charge
transferred to the equivalent gate-source capacitance of the
upper MOSFET as shown in Equation 19:
Q_GATE = C_BOOT × (V_BOOT1 – V_BOOT2)
(EQ. 19)
where Q_GATE is the maximum total gate charge of the upper
MOSFET, C_BOOT is the bootstrap capacitance, V_BOOT1 is
the bootstrap voltage immediately before turn-on, and
V_BOOT2 is the bootstrap voltage immediately after turn-on.
The bootstrap capacitor begins its refresh cycle when the gate
drive begins to turn-off the upper MOSFET. A refresh cycle
ends when the upper MOSFET is turned on again, which varies
depending on the switching frequency and duty cycle.
The minimum bootstrap capacitance can be calculated by
rearranging Equation 19 and solving for CBOOT in
Equation 20.
C_BOOT
≥
-----------------^Q-----^G----^A----^T----^E------------------
V_BOOT1 – V_BOOT2
(EQ. 20)
Typical gate charge values for MOSFETs considered in
these types of applications range from 20 to 100nC. Since
the voltage drop across Q_LOWER is negligible, V_BOOT1 is
simply V_CPVOUT - V_D. A schottky diode is recommended to
minimize the voltage drop across the bootstrap capacitor
during the on-time of the upper MOSFET. Initial calculations
with V_BOOT2 no less than 4V will quickly help narrow the
bootstrap capacitor range.
For example, consider an upper MOSFET is chosen with a
maximum gate charge, Q_g, of 100nC. Limiting the voltage
drop across the bootstrap capacitor to 1V results in a value
of no less than 0.1µF. The tolerance of the ceramic capacitor
should also be considered when selecting the final bootstrap
capacitance value.
A fast recovery diode is recommended when selecting a
bootstrap diode to reduce the impact of reverse recovery
charge loss. Otherwise, the recovery charge, Q_RR, would
have to be added to the gate charge of the MOSFET and
taken into consideration when calculating the minimum
bootstrap capacitance.
ISL6527, ISL6527A DC/DC Converter
Application Circuit
Figure 8 shows an application circuit of a DC/DC Converter.
Detailed information on the circuit, including a complete
Bill-of-Materials and circuit board description, can be found
in Application Note AN1021.
http://www.intersil.com/data/an/an1021.pdf
13
FN9056.10
November 18, 2008