ISL23328 Datasheet, PDF (13/20 Pages) Intersil Corporation – Dual, 128-Tap, Low Voltage Digitally Controlled Potentiometer (XDCP™)

ISL23328
Typical Performance Curves (Continued)
1V/DIV
0.2µs/DIV
SCL
9TH CLOCK OF THE
DATA BYTE (ACK)
0.5V/DIV
20µs/DIV
WIPER
V_CC
WIPER
FIGURE 21. WIPER LARGE SIGNAL SETTLING TIME
FIGURE 22. POWER-ON START-UP IN VOLTAGE DIVIDER MODE
CH1: RH TERMINAL
CH2: RW TERMINAL
0.5V/DIV, 0.2µs/DIV
-3dB FREQUENCY = 1.4MHz AT MIDDLE TAP
FIGURE 23. 10kΩ -3dB CUT OFF FREQUENCY
1.8
1.6
1.4
1.2
1.0
V_CC = 5.5V, V_LOGIC = 5.5V
0.8
0.6
0.4
V_CC = 1.7V, V_LOGIC = 1.2V
0.2
0
-40
-15
10
35
60
85
110
TEMPERATURE (°C)
FIGURE 24. STANDBY CURRENT vs TEMPERATURE
Functional Pin Descriptions
Potentiometers Pins
RHI AND RLI
The high (RHi, i = 0, 1) and low (RLi, i = 0, 1) terminals of the
ISL23328 are equivalent to the fixed terminals of a mechanical
potentiometer. RHi and RLi are referenced to the relative position
of the wiper and not the voltage potential on the terminals. With
WRi set to 127 decimal, the wiper will be closest to RHi, and with
the WR set to 0, the wiper is closest to RLi.
RWI
RWi (i = 0, 1) is the wiper terminal, and it is equivalent to the
movable terminal of a mechanical potentiometer. The position of
the wiper within the array is determined by the WRi register.
V_CC
Power terminal for the potentiometer section analog power
source. Can be any value needed to support voltage range of DCP
pins, from 1.7V to 5.5V, independent of the V_LOGIC voltage.
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bi-directional serial data input/output pin for I²C
interface. It receives device address, wiper address and data
from an I²C external master device at the rising edge of the serial
clock SCL, and it shifts out data after each falling edge of the
serial clock.
SDA requires an external pull-up resistor, since it is an open drain
input/output.
13
FN7902.0
August 19, 2011